XQV600E-6BG432N of Xilinx QPro Virtex-E 1.8V QML High-Reliability FPGAs

XQV600E-6BG432N FPGAs Overview

The Virtex-E FPGA family XQV600E-6BG432N delivers high-performance, high-capacity programmable logic solutions. Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 6-layer metal 0.18 µm CMOS process. These advances make Virtex-E XQV600E-6BG432N FPGAs powerful and flexible alter natives to mask-programmed gate arrays.

XQV600E-6BG432N devices feature a flexible, regular architecture that comprises an array of configurable logic blocks (CLBs) surrounded by programmable input/output blocks (IOBs), all interconnected by a rich hierarchy of fast, versatile routing resources. The abundance of routing resources permits the Virtex-E family to accommodate even the largest and most complex designs.

Virtex-E XQV600E-6BG432N FPGAs are SRAM-based, and are customized by loading configuration data into internal memory cells. Configuration data can be read from an external SPROM (master serial mode), or can be written into the FPGA (SelectMAP, slave serial, and JTAG modes). The standard Xilinx Foundation Series and Alliance Series Development systems deliver complete design support for Virtex-E, covering every aspect from behavioral and schematic entry, through simulation, automatic design translation and implementation, to the creation and downloading of a configuration bit stream.

Higher Performance

Virtex-E XQV600E-6BG432N devices provide better performance than previous generations of FPGAs. Designs can achieve synchronous system clock rates up to 240 MHz including I/O or 622 Mb/s using Source Synchronous data transmission architechtures. Virtex-E I/Os comply fully with 3.3V PCI specifications, and interfaces can be implemented that operate at 33 MHz or 66 MHz. While performance is design-dependent, many designs operate internally at speeds in excess of 133 MHz and can achieve over 311 MHz.

Features

• Certified to MIL-PRF-38535 (Qualified Manufacturer Listing)
• Guaranteed over the full military temperature range (–55°C to +125°C)
• Ceramic and Plastic Packages
• Fast, High-Density 1.8V FPGA Family
- Densities from 600K to 2M system gates
- 130 MHz internal performance (four LUT levels)
- Designed for low-power operation
- PCI compliant 3.3V, 32-bit, 33 MHz
• Highly Flexible SelectIO+ Technology
- Supports 20 high-performance interface standards
- Up to 804 singled-ended I/Os or 344 differential I/O pairs for an aggregate bandwidth of > 100 Gb/s
• Differential Signalling Support
- LVDS (622 Mb/s), BLVDS (Bus LVDS), LVPECL
- Differential I/O signals can be input, output, or I/O
- Compatible with standard differential devices
- LVPECL and LVDS clock inputs for 300+ MHz clocks
• Proprietary High-Performance SelectLink Technology
- Double Data Rate (DDR) to Virtex-E link
- Web-based HDL generation methodology
• Sophisticated SelectRAM+ Memory Hierarchy
- 600 Kb of internal configurable distributed RAM
- Up to 640 Kb of synchronous internal block RAM
- Dual port block RAM capability
- Memory bandwidth up to 1.66 Tb/s (equivalent bandwidth of over 100 RAMBUS channels)
- Designed for high-performance Interfaces to External Memories
- Dedicated multiplier support
- Cascade chain for wide-input function
- Abundant registers/latches with clock enable, and dual synchronous/asynchronous set and reset
- Internal 3-state bussing
- IEEE 1149.1 boundary-scan logic
- Die-temperature sensor diode
• Supported by Xilinx Foundation and Alliance Series Development Systems
- Further compile time reduction of 50%
- Internet Team Design (ITD) tool ideal for million-plus gate density designs
- Wide selection of PC and workstation platforms
• SRAM-Based In-System Configuration
- Unlimited reprogrammability
• Advanced Packaging Options
- 1.0 mm BGA
- 1.27 mm BGA
• 0.18 µm 6-Layer Metal Process

FAQ

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Q: How can I obtain software development tools related to the Xilinx FPGA platform?
In FPGA/CPLD design tools, Xilinx's Vivado Design Suite is easy to use, it is very user-friendly in synthesis and implementation, and it is easier to use than ISE design tools; The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
Q: Where can I purchase Xilinx XQV600E Development Boards, Evaluation Boards, or QPro Virtex-E 1.8V QML High-Reliability FPGAs Starter Kit? also provide technical information?
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Q: How to obtain XQV600E-6BG432N technical support documents?
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