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FPGAKey Technical Documents
Download DatasheetThe XQ6SLX75-2CSG484I provides a secure foundation for information assurance and anti-tamper designs that require low power and low cost for Aerospace and Defense applications. The Spartan-6Q XQ6SLX75-2CSG484I is the third generation of secure product offered for high-level cryptography and tamper proofing approved by government agencies. Built on a mature 45 nm low-power copper process technology that delivers the optimal balance of cost, power, and performance, the XQ6SLX75-2CSG484I fpga offers a more efficient, dual-register 6-input look-up table (LUT) logic and a rich selection of built-in system-level blocks. These include 18 Kb (2 x 9 Kb) block RAMs, second generation DSP48A1 slices, SDRAM memory controllers, enhanced mixed-mode clock management blocks, SelectIO technology, power-optimized high-speed serial transceiver blocks, PCI Express compatible Endpoint blocks, advanced system-level power management modes, auto-detect configuration options, and enhanced IP security with AES and Device DNA protection. These features provide a low-cost programmable alternative to custom ASIC products with unprecedented ease of use. XQ6SLX75-2CSG484I FPGAs offer the best possible solution for defense related applications where SWaP-C reduction is paramount with absolute security and ruggedized environment operation.
Spartan-6Q Family:
Spartan-6Q LX FPGA: Logic optimized
Spartan-6Q LXT FPGA: High-speed serial connectivity
Designed for low cost
Multiple efficient integrated blocks
Optimized selection of I/O standards
Staggered pads
High-volume plastic wire-bonded packages
Low static and dynamic power
45 nm process optimized for cost and low power
Hibernate power-down mode for zero power
Suspend mode maintains state and configuration with multi-pin wake-up, control enhancement
Lower-power 1.0V core voltage (LX FPGAs, -1L only)
High performance 1.2V core voltage (LX and LXT FPGAs, -2 and -3 speed grades)
Multi-voltage, multi-standard SelectIO interface banks
Up to 1,080 Mb/s data transfer rate per differential I/O
Selectable output drive, up to 24 mA per pin
3.3V to 1.2V I/O standards and protocols
Low-cost HSTL and SSTL memory interfaces
Hot swap compliance
Adjustable I/O slew rates to improve signal integrity
High-speed GTP serial transceivers in the LXT FPGAs
Up to 3.2 Gb/s
High-speed interfaces including: Serial ATA, Aurora, 1G Ethernet, PCI Express, OBSAI, CPRI, EPON, GPON, DisplayPort, and XAUI
Integrated Endpoint block for PCI Express designs (LXT)
Low-cost PCI technology support compatible with the 33 MHz, 32- and 64-bit specification.
Efficient DSP48A1 slices
High-performance arithmetic and signal processing
Fast 18 x 18 multiplier and 48-bit accumulator
Pipelining and cascading capability
Pre-adder to assist filter applications
Integrated Memory Controller blocks
Faster embedded processing with enhanced, low cost, MicroBlaze soft processor
Industry-leading IP and reference designs
Artificial Intelligence
5G Technology
Cloud Computing
Consumer Electronics
Wireless Technology
Industrial Control
Internet of Things
Medical Equipment
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