$6178.427 - $6864.919 | 1 Pieces(Min. Order)
Factory Excess Stock / Franchised Distributor
Embedded - FPGAs (Field Programmable Gate Array)
FPGA Virtex UltraScale Family 626640 Cells 20nm Technology 0.95V 1517-Pin FCBGA
1.The XCVU065-1FFVC1517I FPGAs with a focus on price/performance, using both monolithic and next-generation stacked silicon interconnect (SSI) technology. High DSP and block RAM-to-logic ratios and next-generation transceivers, combined with low-cost packaging, enable an optimum blend of capability and cost.
2.Kintex XCVU065-1FFVC1517I devices have increased performance and on-chip UltraRAM memory to reduce BOM cost, providing the ideal mix of high-performance peripherals and cost-effective system implementation. In addition, Kintex UltraScale XCVU065-1FFVC1517I FPGAs have numerous power options that deliver the optimal balance between the required system performance and the smallest power envelope.
3.The XCVU065-1FFVC1517I FPGAs enabled using both monolithic and next-generation SSI technology to achieve the highest system capacity, bandwidth, and performance.
4.from 32 to 64 bits, the ZKintex XCVU065-1FFVC1517I devices provide unprecedented power savings, processing, programmable acceleration, I/O, and memory bandwidth ideal for applications that require heterogeneous processing.The Xilinx Embedded - FPGAs (Field Programmable Gate Array) series XCVU065-1FFVC1517I is Virtex UltraScale FPGA 520 I/O 1517FCBGA, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at FPGAkey.com, and you can also search for other FPGAs products.
UltraScale+ MPSoCs are built around a feature-rich quad-core ARM Cortex-A53 and dual-core ARM Cortex-R5 processing system (PS). In addition to the 32-bit/64-bit application processing unit (APU) and 32-bit real-time processing unit (RPU), the PS contains a dedicated ARM Mali-400 MP2 graphics processing unit (GPU).
I/O, Transceiver, PCIe, 100G Ethernet, and 150G Interlaken
Data is transported on and off chip through a combination of the high-performance parallel SelectIO interface and high-speed serial transceiver connectivity. I/O blocks provide support for cutting-edge memory interface and network protocols through flexible I/O standard and voltage support.
Clocks and Memory Interfaces
UltraScale devices contain powerful clock management circuitry, including clock synthesis, buffering, and routing components that together provide a highly capable framework to meet design requirements.
Routing, SSI, Logic, Storage, and Signal Processing
Configurable Logic Blocks (CLBs) containing 6-input look-up tables (LUTs) and flip-flops, DSP slices with 27x18 multipliers, 36Kb block RAMs with built-in FIFO and ECC support, and 4Kx72 UltraRAM blocks (in UltraScale+ devices) are all connected with an abundance of high-performance, low-latency interconnect. In addition to logical functions, the CLB provides shift register, multiplexer, and carry logic functionality as well as the ability to configure the LUTs as distributed memory to complement the highly capable and configurable block RAMs.
Configuration, Encryption, and System Monitoring
The configuration and encryption block performs numerous device-level functions critical to the successful operation of the FPGA or MPSoC.
UltraScale and UltraScale+ families provide footprint compatibility to enable users to migrate designs from one device or family to another. Any two packages with the same footprint identifier code are footprint compatible.
Internet of Things
Number of LABs/CLBs
Number of Logic Elements/Cells
Total RAM Bits
Number of I/O
Voltage - Supply
0.922V ~ 0.979V
-40℃ ~ 100℃ (TJ)
Package / Case
Supplier Device Package