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FPGAKey Technical Documents
Download DatasheetThe XC95144-10PGG100C is a 2.5V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of eight 54V18 Function Blocks, providing 3,200 usable gates with propagation delays of 5 ns.
144 macrocells with 3,200 usable gates
Available in small footprint packages
100-pin TQFP (81 user I/O pins)
144-pin TQFP (117 user I/O pins)
144-pin CSP (117 user I/O pins)
Optimized for high-performance 2.5V systems
Low power operation
Multi-voltage operation
Advanced system features
In-system programmable
Two separate output banks
Superior pin-locking and routability with Fast CONNECT II switch matrix
Extra wide 54-input Function Blocks
Up to 90 product-terms per macrocell with individual product-term allocation
Local clock inversion with three global and one product-term clocks
Individual output enable per output pin
Input hysteresis on all user and boundary-scan pin inputs
Bus-hold ciruitry on all user pin inputs
Full IEEE Standard 1149.1 boundary-scan (JTAG)
Fast concurrent programming
Slew rate control on individual outputs
Enhanced data security features
Excellent quality and reliability
20 year data retention
ESD protection exceeding 2,000V
Artificial Intelligence
5G Technology
Cloud Computing
Consumer Electronics
Wireless Technology
Industrial Control
Internet of Things
Medical Equipment
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