Combining Advanced Silicon Modular Block (ASMBL) architecture with a wide variety of flexible features, the XC4VFX12-13SFG363I greatly enhances programmable logic design capabilities, making it a powerful alternative to ASIC technology.
Virtex-4 XC4VFX12-13SFG363I FPGAs comprise three platform families—LX, FX, and SX—offering multiple feature choices and combinations to address all complex applications. The wide array of Virtex-4 FPGA hard-IP core blocks includes the PowerPC processors (with a new APU interface), tri-mode Ethernet MACs, 622 Mb/s to 6.5 Gb/s serial transceivers, dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. Virtex-4 XC4VFX12-13SFG363I devices are produced on a state-of-the-art 90 nm copper process using 300 mm (12-inch) wafer technology.
Smart RAM Memory Hierarchy
Optional pipeline stages
Optional programmable FIFO logic automatically remaps RAM signals as FIFO signals
Dual-port 18-Kbit RAM blocks
High-speed memory interface supports DDR and DDR-2 SDRAM, QDR-II, and RLDRAM-II.
1.5V to 3.3V I/O operation
Built-in ChipSync source-synchronous technology
Digitally controlled impedance (DCI) active termination
Fine grained I/O banking (configuration in one bank)
Flexible Logic Resources
Secure Chip AES Bitstream Encryption
90 nm Copper CMOS Process
1.2V Core Voltage
Flip-Chip Packaging including Pb-Free Package Choices
RocketIO 622 Mb/s to 6.5 Gb/s Multi-Gigabit Transceiver (MGT) [FX only]
IBM PowerPC RISC Processor Core [FX only]
PowerPC 405 (PPC405) Core
Auxiliary Processor Unit Interface (User Coprocessor)
Multiple Tri-Mode Ethernet MACs [FX only]
Internet of Things