$6.09 - $25 | 1 Pieces(Min. Order)
For product pricing customization or other inquiries
Contact NowFPGAKey Technical Documents
Download DatasheetThe CMOS XC3064-7PQ160I of Logic Cell Array (LCA) families provide a group of high-performance, high-density, digital integrated circuits. Their regular, extendable, flexible, user-programmable array architecture is com· posed of a configuration program store plus three types of configurable elements: a perimeter of 1/0 Blocks (lOBs), a core array of Configurable Logic Bocks (CLBs) and re· sources for interconnection. The general structure of an LCA device is shown in XC3064-7PQ160I Diagram on the next page. The XACT development system provides schematic capture and auto place-and-route for design entry. Logic and timing simulation, and in-circuit emulation are available as design verification alternatives. The design editor is used for interactive design optimization, and to compile the data pattern that represents the configuration program.
The LCA user logic functions and interconnections are determined by the configuration program data stored in internal static memory cells. The program can be loaded in any of several modes to accommodate various system requirements. The program data resides externally in an EEPROM, EPROM or ROM on the application circuit board, or on a floppy disk or hard disk. On-chip initialization logic provides for optional automatic loading of program data at power-up. The companion XC17XX Serial Configuration PROMs provide a very simple serial config· uration program storage in a one-lime programmable package.
• Ideal for a wide range of custom VLSI design tasks
- Replaces TTL, MSI, and other PLD logic
- Integrates complete sub-systems into a single package
- Avoids the NRE, time delay, and risk of conventional masked gate arrays
• High-performance CMOS static memory technology
- Guaranteed toggle rates of 70 to 325 MHz, logic delays from 9 to 2.2 ns
- System clock speeds over 80 MHz
- Low quiescent and active power consumption
• Flexible FPGA architecture
- Compatible arrays ranging from 1,000 to 7,500 gate complexity
- Extensive register, combinatorial, and 1/0 capabilities
- High fan-out signal distribution, low-skew clock nets
- Internal 3-state bus capabilities
- TTL or CMOS input thresholds
- On-chip crystal oscillator amplifier
• Unlimited reprogrammability
- Easy design iteration
- In-system logic changes
• Extensive Packaging Options
- Over 20 different packages
- Plastic and ceramic surface-mount and pin-grid· array packages
- Thin and Very Thin Quad Flat Pack (TQFP and VQFP) options
• Ready for volume production
- Standard, off-the-shelf product availability
- 100% factory pre-tested devices
- Excellent reliability record
• Complete XACT Development System
- Schematic capture, automatic place and route
- Logic and timing simulation
- Interactive design editor for design optimization
- Timing calculator
- Interfaces to popular design environments like Viewlogic, Cadence, Mentor Graphics, and others
Artificial Intelligence
5G Technology
Cloud Computing
Consumer Electronics
Wireless Technology
Industrial Control
Internet of Things
Medical Equipment
14+ $24.5692
20+ $24.5448
30+ $24.5205
70+ $24.4961
140+ $24.4718
14+ $24.5692
20+ $24.5448
30+ $24.5205
70+ $24.4961
140+ $24.4718
180+ $15.8099
360+ $14.6643
540+ $12.373
900+ $11.2273
1800+ $10.1733
9000+ $8.936
18000+ $8.3861
180+ $20.2226
360+ $18.7572
540+ $15.8264
900+ $14.361
1800+ $13.0128
9000+ $11.4302
18000+ $10.7268
180+ $16.0821
360+ $14.9167
540+ $12.586
900+ $11.4206
1800+ $10.3485
9000+ $9.0899
18000+ $8.5305
180+ $15.8099
360+ $14.6643
540+ $12.373
900+ $11.2273
1800+ $10.1733
9000+ $8.936
18000+ $8.3861
180+ $7.5937
180+ $9.3607
180+ $7.5491
1+ $7.5968
1000+ $7.1838
1+ $6.2500
1+ $9.3000
1+ $6.2500
1+ $6.2500
1+ $6.0900
Support