$31.685 - $29.412 | 1 Pieces(Min. Order)
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FPGAKey Technical Documents
Download DatasheetThe XC2S50-5PQ208CES are customized by loading configuration data into internal static memory cells. Unlimited reprogramming cycles are possible with this approach. Stored values in these cells determine logic functions and interconnections implemented in the FPGA. Configuration data can be read from an external serial PROM (master serial mode), or written into the FPGA in slave serial, slave parallel, or Boundary Scan modes.
XC2S50-5PQ208CES FPGAs are typically used in high-volume applications where the versatility of a fast programmable solution adds benefits. shortening product development cycles while offering a cost-effective solution for high volume production.
Versatile I/O and packaging
- Pb-free package options
- Low-cost packages available in all densities
- Family footprint compatibility in common packages
- 16 high-performance interface standards
- Hot swap Compact PCI friendly
- Zero hold time simplifies system timing
• System level features
- SelectRAM hierarchical memory:
· 16 bits/LUT distributed RAM
· Configurable 4K bit block RAM
· Fast interfaces to external RAM
• Second generation ASIC replacement technology
- Densities as high as 5,292 logic cells with up to 200,000 system gates
- Streamlined features based on Virtex FPGA architecture
- Unlimited reprogrammability
- Very low cost
- Cost-effective 0.18 micron process
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