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FPGAKey Technical Documents
Download DatasheetThe XC2S100E-5PQG208I of Spartan-IIE Field-Programmable Gate Array family gives users high performance, abundant logic resources, and a rich feature set, all at an exceptionally low price. The seven-member family offers densities ranging from 50,000 to 600,000 system gates, as shown in Datasheet PDF. System performance is supported beyond 200 MHz.
Features include block RAM (to 288K bits), distributed RAM (to 221,184 bits), 19 selectable I/O standards, and four DLLs (Delay-Locked Loops). Fast, predictable interconnect means that successive design iterations continue to meet timing requirements.
The XC2S100E-5PQG208I family is a superior alternative to mask-programmed ASICs. The FPGA avoids the initial cost, lengthy development cycles, and inherent risk of conventional ASICs. Also, FPGA programmability permits design upgrades in the field with no hardware replacement necessary (impossible with ASICs).
• Second generation ASIC replacement technology
- Densities as high as 15,552 logic cells with up to 600,000 system gates
- Streamlined features based on Virtex-E FPGA architecture
- Unlimited in-system reprogrammability
- Very low cost
- Cost-effective 0.15 micron technology
• System level features
- SelectRAM hierarchical memory:
· 16 bits/LUT distributed RAM
· Configurable 4K-bit true dual-port block RAM
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