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Download DatasheetThe Xilinx XA6SLX45T-2FGG484I FPGAs provides leading system integration capabilities with the lowest total cost for highvolume automotive applications. Built on a mature 45 nm low-power copper process technology that delivers the optimal balance of cost, power, and performance, the XA6SLX45T-2FGG484I offers a new, more efficient, dual-register 6-input look-up table (LUT) logic and a rich selection of built-in system-level blocks. These include 18 Kb (2 x 9 Kb) block RAMs, second generation DSP48A1 slices, SDRAM memory controllers, enhanced mixed-mode clock management blocks, SelectIO technology, power-optimized high-speed serial transceiver blocks, PCI Express compatible Endpoint blocks, advanced system-level power management modes, auto-detect configuration options, and enhanced IP security with AES and Device DNA protection.
These features provide a low-cost programmable alternative to custom ASIC products with unprecedented ease of use. XA6SLX45T-2FGG484I offer the best solution for flexible and scalable high-volume logic designs, high-bandwidth parallel DSP processing designs, and cost-sensitive applications where multiple interfacing standards are required. XA6SLX45T-2FGG484I FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components that enable designers to focus on innovation as soon as their development cycle begins.
The Xilinx Embedded - FPGAs (Field Programmable Gate Array) series XA6SLX45T-2FGG484I is FPGA XA Spartan-6 Family 43661 Cells 45nm (CMOS) Technology 1.2V 484Pin FBGA, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at FPGAkey.com, and you can also search for other FPGAs products.• XA Spartan-6 Family:
• DDR, DDR2, DDR3, and LPDDR support
• Low noise, flexible clocking
• Digital Clock Managers (DCMs) eliminate clock skew and duty cycle distortion
• Phase-Locked Loops (PLLs) for low-jitter clocking
• Frequency synthesis with simultaneous multiplication, division, and phase shifting
• Sixteen low-skew global clock networks
• Simplified configuration, supports low-cost standards
• 2-pin auto-detect configuration
• Broad third-party SPI (up to x4) and NOR flash support
• Enhanced security for design protection
• Unique Device DNA identifier for design authentication
• AES bitstream encryption in the XA6SLX75, XA6SLX75T, and XA6SLX100 devices
• Integrated Endpoint block for PCI Express designs (LXT)
• Strong automotive-specific third-party ecosystem with IP, development boards, and design services
Block RAM
Every Spartan-6 FPGA has between 12 and 268 dual-port block RAMs, each storing 18 Kb. Each block RAM has two completely independent ports that share only the stored data.
Synchronous Operation
Each memory access, whether read or write, is controlled by the clock. All inputs, data, address, clock enables, and write enables are registered. The data output is always latched, retaining data until the next operation. An optional output data pipeline register allows higher clock rates at the cost of an extra cycle of latency. During a write operation in dual-port mode, the data output can reflect either the previously stored data, the newly written data, or remain unchanged.
Artificial Intelligence
5G Technology
Cloud Computing
Consumer Electronics
Wireless Technology
Industrial Control
Internet of Things
Medical Equipment
Specification | Value |
---|---|
Number of LABs/CLBs | 3411 |
Number of Logic Elements/Cells | 43661 |
Total RAM Bits | 2138112 |
Number of I/O | 296 |
Voltage - Supply | 1.14V ~ 1.26V |
Mounting Type | Surface Mount |
Operating Temperature | -40℃ ~ 100℃ (TJ) |
Package / Case | 484-BBGA |
Supplier Device Package | 484-FBGA (23x23) |
FPGA XA Spartan-6 Family 43661 Cells 45nm Technology 1.2V Automotive 324-Pin CSBGA
FPGA XA Spartan-6 Family 43661 Cells 45nm Technology 1.2V Automotive 484-Pin FBGA
FPGA XA Spartan-6 Family 43661 Cells 45nm Technology 1.2V Automotive 484-Pin FBGA
FPGA XA Spartan-6 Family 43661 Cells 45nm Technology 1.2V Automotive 324-Pin CSBGA
1+ $93.5200
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