ASIC is an application-specific integrated circuit, which refers to an integrated circuit designed and manufactured in response to the requirements of specific users and the needs of specific electronic systems. Currently, CPLD (complex programmable logic device) and FPGA (field programmable logic array) are one of the most popular methods for ASIC design. Their commonality is that they all have user field programmable features and support boundary scan technology, but Both have their own characteristics in terms of integration, speed and programming methods.
At present, ASIC is considered as an integrated circuit designed for special purposes in the integrated circuit industry. Refers to integrated circuits designed and manufactured in response to specific user requirements and the needs of specific electronic systems. The characteristics of ASICs are to meet the needs of specific users. Compared with general-purpose integrated circuits, ASICs have the advantages of smaller size, lower power consumption, improved reliability, improved performance, enhanced confidentiality, and lower costs.
An integrated circuit (integrated circuit) is a microelectronic device or component. Using a certain process, the transistors, resistors, capacitors and inductors required in a circuit are interconnected together with the wiring, made on one or a few small semiconductor wafers or dielectric substrates, and then packaged in a package to become Miniature structure with the required circuit functions; all of the components have been integrated into a structure, making electronic components a big step toward miniaturization, low power consumption, intelligence and high reliability. The integrated circuit was invented in the 1970s by Jack Kirby (an integrated circuit based on germanium (Ge)) and Robert Neuss (an integrated circuit based on silicon (Si)). 
The larger the scale of integrated circuits, the harder it is to change these special problems to solve these problems when building a system. Therefore, an application specific integrated circuit (ASIC) featuring user participation in design has emerged, which can realize the optimized design of the whole system, with superior performance and strong confidentiality. The application-specific integrated circuit can integrate several, dozens, or even hundreds of general-purpose medium- and small-scale integrated circuits that perform some functions on a single chip, and then the entire system can be integrated on a single chip to achieve the system's need. It optimizes the circuit of the whole machine, reduces the number of components, shortens the wiring, reduces the volume and weight, and improves the system reliability.
ASIC is characterized by specific user needs, with more varieties and fewer batches, requiring short design and production cycles. It is a product of tight integration of integrated circuit technology and specific user's machine or system technology. It has a volume compared with general integrated circuits. Smaller, lighter, lower power consumption, improved reliability, improved performance, enhanced confidentiality, reduced costs and other advantages.
Due to the convenience and good reliability of ASIC, it is increasingly used in the design and development of safety-related products, such as intelligent safety transmitters, safety bus interface devices or safety controllers. However, because it is different from traditional analog circuits or general ICs, how to evaluate the functional safety of ASICs, including how to evaluate the functional safety of products when ASICs are integrated into product development, has gradually become a new problem and hot spot. ASIC has its own complexity characteristics. For example, there may be hundreds of millions of MOS tubes on an ASIC, and each MOS tube may fail. How to determine and control these functional safety issues that need to be considered: Another example is the need to use special tools such as Verilog in the ASIC design process. Evaluating the applicability of these tools and the quality control of the development process are also issues that need to be resolved. 
In 2010, the functional safety basic standard IEC61508 released the second edition: IEC61508-2010: ED2.0. There are detailed regulations on the use of ASIC for the development of safety-related systems, including the definition of the life cycle model of ASIC, and the requirements for ASIC control failure and failure avoidance are proposed.
ASIC is divided into fully customized and semi-customized. Full custom design requires the designer to complete the design of all circuits, so it requires a lot of manpower and material resources, good flexibility but low development efficiency. If the design is ideal, full customization can run faster than semi-custom ASIC chips. Semi-customized use of standard logic cells (Standard Cell) in the library, the design can choose from the standard logic cell library SSI (gate circuit), MSI (such as adder, comparator, etc.), data path (such as ALU, memory, bus Etc.), memory, and even system-level modules (such as multipliers, microcontrollers, etc.) and IP cores. These logic units have been laid out and are designed to be more reliable. Designers can easily complete system design. Modern ASICs often contain the entire 32-bit processor, storage units like ROM, RAM, EEPROM, Flash, and other modules. Such ASICs are often called SoCs (system on chip).
FPGA is a close relative of ASIC. Generally, the digital system is modeled through schematic diagrams and VHDL. EDA software is used to simulate and synthesize to generate a network table based on some standard libraries. It can be used after being configured to the chip. The difference between it and ASIC is that users do not need to intervene in the layout and wiring of the chip and process issues, and they can change their logic functions at any time and use them flexibly.
Fully customized ASIC is a design method that uses the most basic design method of integrated circuits (without using existing library units) to carry out elaborate design of all components in integrated circuits. The fully customized design can achieve the smallest area, the best wiring layout, the best power consumption speed product, and the best electrical characteristics. This method is especially suitable for analog circuits, digital-analog hybrid circuits, and occasions with special requirements for speed, power consumption, die area, and other device characteristics (such as linearity, symmetry, current capacity, withstand voltage, etc.); or in the absence of The occasion of ready-made component library. Features: precision work, high design requirements, long cycle, and expensive design costs.
As the cell library and functional module circuits become more mature, the method of full custom design is gradually replaced by the semi-custom method. In the current IC design, the phenomenon that the entire circuit adopts a fully customized design is getting less and less. Full custom design requirements: Full custom design needs to consider the process conditions, according to the complexity and difficulty of the circuit to determine the device process type, the number of wiring layers, material parameters, process methods, limit parameters, yield and other factors. Requires experience and skills to master various design rules and methods, generally completed by professional microelectronics IC designers; conventional design can learn from previous designs, some devices need to be designed individually according to electrical characteristics; layout, wiring, layout combinations, etc. need to be repeated Make adjustments and design the layout according to the design principles of best size, most reasonable layout, shortest connection, and most convenient pin. The layout design is related to the process. It is necessary to fully understand the process specifications and rationally design the layout and process according to the process parameters and process requirements.
Semi-custom design methods are divided into standard cell-based design methods and gate array-based design methods.
The design method based on the standard unit is: arrange the pre-designed logical units called standard units, such as AND gate, OR gate, multiple switch, trigger, etc., according to a certain specific arrangement, and the pre-designed large The units together form an ASIC. ASIC based on standard cells is also called CBIC (CellbasedIC).
The design method based on the gate array is to complete the application-specific integrated circuit design through a mask interconnection method on the pre-specified substrate or mother substrate with the transistor array. Compared with full customization, semi-customization can shorten the development cycle and reduce development costs and risks.
First of all, it is necessary to divide the internal function modules of the ASIC so that each function module can realize the corresponding function. The various functional modules are connected together to form the entire ASIC circuit. Second, according to the division of function modules, according to the function and interface requirements, the hardware description language (HDL) is used to design the logic of the module to form the register transfer level (RTL) code. Thirdly, according to the function and timing requirements of ASIC specifications, use field programmable logic gate array (FPGA) prototype or software simulation to write test code or test incentives to verify logic and ensure that the logic design fully meets the design requirements . Fourth, the RTL code is mapped to the corresponding process library through a logic synthesis tool, layout design such as layout and wiring is completed, timing verification and convergence are completed, and layout data for wafer production is formed.
CPLD CoolRunner -II Family 6K Gates 256 Macro Cells 256MHz 0.18um Technology 1.8V 132-Pin CSBGA
FPGA Spartan-3A Family 400K Gates 8064 Cells 667MHz 90nm Technology 1.2V 320-Pin FBGA
FPGA Spartan-3A Family 400K Gates 8064 Cells 667MHz 90nm Technology 1.2V 320-Pin FBGA
FPGA Spartan-3A Family 400K Gates 8064 Cells 667MHz 90nm Technology 1.2V 256-Pin FTBGA
CPLD CoolRunner -II Family 6K Gates 256 Macro Cells 256MHz 0.18um Technology 1.8V 144-Pin TQFP