Block RAM, SP3 contains up to 1.87Mbit Block RAM, mainly used to construct data cache, deep FIFO and buffer.
Block RAM (BRAM): block random access memory
Xlinx's SP3 series FPGAs include two types of RAM: Block RAM and distributed RAM.
SP3 contains Block RAM of up to 1.87Mbit, which is mainly used to construct data cache, deep FIFO and buffer.
Each Block RAM is 18Kbit, the structure is a true dual-port RAM, including two complete sets of 36bit read-write data bus and corresponding control bus. Each Block RAM can be configured as single-port RAM (maximum bandwidth is 72bit) or dual-port RAM (maximum bandwidth is 36bit), and supports cascading, which can cascade up to 104 synchronous 18Kbit Block RAM. SP3 Block RAM supports multiple aspect ratios, multiple data bandwidth conversions, and supports parity operations.
FPGA Spartan-3 Family 5M Gates 74880 Cells 630MHz 90nm Technology 1.2V 1156-Pin FBGA
FPGA Spartan-3 Family 5M Gates 74880 Cells 630MHz 90nm Technology 1.2V 900-Pin FBGA
FPGA Spartan-3 Family 5M Gates 74880 Cells 725MHz 90nm Technology 1.2V 676-Pin FBGA
FPGA Spartan Family 5K Gates 238 Cells 125MHz 5V 100-Pin VTQFP
FPGA Spartan-3 Family 5M Gates 74880 Cells 725MHz 90nm Technology 1.2V 676-Pin FBGA
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