vhdl

Language Introduction

VHDL language is a high-level language for circuit design. It appeared in the late 1980s. It was originally developed by the US Department of Defense for the US military to improve the reliability of the design and shorten the development cycle of a design language with a smaller scope of use.

Translating VHDL into Chinese is a hardware description language for ultra-high-speed integrated circuits, which is mainly used in the design of digital circuits. Most of its applications in China are used in the design of FPGA/CPLD/EPLD. Of course, in some relatively strong units, it is also used to design ASICs.

VHDL is mainly used to describe the structure, behavior, functions and interfaces of digital systems. In addition to containing many sentences with hardware characteristics, VHDL's language form, description style, and grammar are very similar to general computer high-level languages. VHDL's program structure is characterized by dividing an engineering design, or design entity (which can be a component, a circuit module, or a system), into an external (or visible part and port) and an internal (or invisible part) , Both involving the internal function of the entity and the completion of the algorithm. After defining an external interface for a design entity, once its internal development is completed, other designs can directly call this entity. This concept of dividing the design entity into internal and external parts is the basic point of VHDL system design.

Development History

The full name of VHDL is Very-High-Speed Integrated Circuit Hardware Description Language, which was born in 1982. At the end of 1987, VHDL was recognized as a standard hardware description language by IEEE and the US Department of Defense. Since IEEE-1076 (87 version for short), EDA companies have successively launched their own VHDL design environment, or announced that their design tools can interface with VHDL. In 1993, IEEE revised VHDL to extend the content of VHDL from a higher level of abstraction and system description capabilities, and announced a new version of VHDL, which is the 1076-1993 version of the IEEE standard, or 93 version for short. VHDL and Verilog, as the industry standard hardware description language of IEEE, are supported by many EDA companies. In the field of electronic engineering, it has become the de facto general hardware description language.

Features

Compared with other hardware description languages, VHDL has the following characteristics:

1.Powerful and flexible design

VHDL has a powerful language structure that can describe complex logical controls with concise and clear source code. It has a multi-level design description function, layer by layer refinement, and finally can directly generate circuit-level descriptions. VHDL supports the design of synchronous circuits, asynchronous circuits and random circuits, which is unmatched by other hardware description languages. VHDL also supports various design methods, supporting both bottom-up design and top-down design; both modular design and hierarchical design.

2.Supports extensive and easy to modify

Since VHDL has become a hardware description language regulated by the IEEE standard, most EDA tools almost support VHDL, which lays the foundation for the further promotion and wide application of VHDL. In the hardware circuit design process, the main design file is the source code written in VHDL. Because VHDL is easy to read and structure, it is easy to modify the design.

3.Powerful system hardware description capability

VHDL has a multi-level design description function that can describe both system-level circuits and gate-level circuits. The description can use behavior description, register transfer description or structure description, or a mixed level description of the three. In addition, VHDL supports inertial delay and transmission delay, and can also accurately build a hardware circuit model. VHDL supports pre-defined and custom data types, giving greater freedom to hardware descriptions, allowing designers to easily create high-level system models.

4.Independent of device design, independent of process

When designers use VHDL for design, they can concentrate on optimizing the design without first considering selecting the device to complete the design. When the design description is complete, a variety of different device structures can be used to achieve its function.

5.Very strong portability

VHDL is a standardized hardware description language. The same design description can be supported by different tools, making it possible to transplant the design description.

6.Easy to share and reuse

VHDL adopts a library-based (Library) design method and can build various reusable modules. These modules can be pre-designed or use the archive modules from the previous design, and store these modules in the library, they can be reused in future designs, which can communicate and share the design results between designers and reduce hardware circuits. design.

Advantage

(1) Compared with other hardware description languages, VHDL has a stronger ability to describe behavior, which determines that he becomes the best hardware description language in the field of system design. The powerful ability to describe behavior is an important guarantee for avoiding specific device structures and describing and designing large-scale electronic systems in terms of logical behavior.

(2) VHDL's rich simulation statements and library functions make it possible to check the functional feasibility of the design system early in the design of any large system, and to simulate the design at any time.

(3) The behavior description ability and program structure of the VHDL sentence determine his ability to support the decomposition of large-scale design and reuse of existing designs. Large-scale systems that meet market requirements are efficient, and high-speed completion must be achieved by multiple people or even multiple development groups working in parallel.

(4) For a certain design completed with VHDL, EDA tools can be used for logic synthesis and optimization, and the VHDL description design is automatically converted into a gate-level netlist.

(5) VHDL has a relatively independent description of the design. Designers can understand the structure of the hardware and do not have to manage what the target device is in the final design to achieve independent design.