The Vitis unified software platform enables the development of embedded software and accelerated applications on Xilinx heterogeneous platforms (including FPGA, SoC, and Versal ACAP). It can provide a unified programming model for edge, cloud, and hybrid computing application acceleration.
Utilize integration with high-level frameworks, use C, C++, or Python to develop through acceleration libraries, or use RTL-based accelerators and low-level runtime APIs to control the implementation with more granular granularity—choose the abstraction level you need.
A unified design method and programming model for deploying accelerated applications on all Xilinx platforms.
Including Alveo accelerator card, embedded platform, or cloud FPGA instance
By modifying modifying the generated files, develop and deploy your accelerated applications on different hardware platforms.
Access Xilinx adaptive computing in the familiar development process and environment
The Vitis unified software platform provides development tools based on GUI and command lines.
Use high-level frameworks and languages (including Tensorflow and Caffe, C, C++, or Python) to integrate or develop accelerated applications
By accelerating AI inference and other performance-critical functions, use Xilinx adaptive computing to achieve the application's system-level performance goals.
The Vitis AI and Vitis acceleration libraries allow end-to-end application acceleration using pure software-defined processes without the need for specialized hardware technology.
The Vitis unified software platform includes:
Comprehensive kernel development kit for seamless construction of accelerated applications
Complete hardware acceleration open source library, optimized for Xilinx hardware platform
Insert the development environment of a specific field, you can directly develop in the familiar higher-level framework
Evolving hardware acceleration partner library and pre-built application ecosystem
The Vitis AI development environment is a dedicated development environment for accelerating AI inference on Xilinx embedded platforms, Alveo accelerator cards, or cloud FPGA instances. The Vitis AI development environment not only supports industry-leading deep learning frameworks such as Tensorflow and Caffee, but also provides comprehensive APIs for pruning, quantifying, optimizing, and compiling trained networks, so as to achieve the highest AI inference for your deployed applications' performance.
The performance-optimized open-source library provides out-of-the-box acceleration. For existing applications written in C, C++, or Python, there are very few code changes or even no code changes. Use the acceleration library in a specific field as it is, adapt it to your needs through modification, or use it as an algorithm building block in your custom accelerator.
Complete graphical development tools and command line development tools, including Viti's compiler, analyzer, and debugger, are used to build and analyze performance bottlenecks, debug acceleration algorithms, and use C, C++, or OpenCL for development. Use these features in your own IDE, or use the standalone Vitis IDE.
Xilinx Runtime (XRT) facilitates between application code (running on an embedded ARM or x86 host) and accelerators (deployed on PCIe-based Xilinx accelerator cards, MPSoC-based embedded platforms, or ACAP reconfigurable parts) Communication. It includes user-space libraries and APIs, kernel drivers, board utilities, and firmware.
The Vitis target platform defines the basic software and hardware architecture and application environment for the Xilinx platform, including external storage interfaces, custom input and output interfaces, and software runtimes.
For local or cloud Xilinx accelerator cards, the Vitis target platform can automatically configure PCIe interfaces, which can connect and manage the communication between the FPGA accelerator and x86 application code — no connection details are required!
For Xilinx embedded devices, the Vitis target platform also includes the operating system for the processor on the platform, bootloaders and drivers for platform peripherals, and the root file system. You can use the predefined Vitis target platform for the Xilinx evaluation board or you can define your own Vitis target platform in the Vivado® Design Suite.
FPGA Virtex-5 FXT Family 65nm Technology 1V 1136-Pin FCBGA
FPGA Virtex-5 FXT Family 65nm Technology 1V 1136-Pin FCBGA
FPGA Virtex-5 FXT Family 65nm Technology 1V 1136-Pin FCBGA
FPGA XC3000 Family 4.5K Gates 224 Cells 113MHz 5V 160-Pin PQFP
FPGA Virtex-E Family 63.504K Gates 5292 Cells 357MHz 0.18um Technology 1.8V 456-Pin FBGA
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