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CLKUSR

When the Enable User-supplled start-up clock (CLKUSR) option is turned on in the software, this pin can only be used as the initialization clock input pin provided by the user. After all the configuration data has been received, the CONF_DONE pin will become high, and the CII device needs 299 clock cycles to initialize the register, I/O, etc. The FPGA has two methods, one is to use the internal The crystal oscillator (10MHz), the other is the clock from CLKUSR (maximum cannot exceed 100MHz). With this function, it can delay the FPGA start time, and it can be used in special applications that need to be synchronized with other devices.

Enable the User-supplied start-up clock (CLKUSR) option

This option, when turned on in the software, allows the user to use an externally provided clock signal (CLKUSR) for the initialization process of the programmable device.

Initialization Clock Input Pin (CLKUSR)

When the CLKUSR option is enabled, this pin serves as the initialization clock input. It means that the device will use the clock signal provided through this pin during its start-up process.

CONF_DONE Pin

After the configuration data has been received and the device is fully configured, the CONF_DONE pin becomes high. This pin is an indicator that the configuration process has been completed.

Initialization Time

The device needs 299 clock cycles to initialize various components such as registers, I/O, etc., after the CONF_DONE pin goes high.

Clock Sources

The FPGA supports two clock sources for initialization:

  • Internal crystal oscillator (10MHz)
  • External clock from CLKUSR (maximum frequency should not exceed 100MHz)

Initialization Delay

By using the CLKUSR option, you can introduce a delay in the FPGA start time. This can be beneficial in scenarios where synchronization with other devices is crucial.

ASSOCIATED PRODUCTS

FPGA Tutorial Lattice FPGA
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