The most fundamental design elements in the Xilinx®
libraries, sometimes referred to as BELs, or Basic Elements. Primitives are the design element "atoms" and can be combined to create macros. Examples of Xilinx® primitives are the simple buffer, BUF, and the D FF with clock enable and clear, FDCE.
FPGA Virtex-5 FXT Family 65nm Technology 1V 665-Pin FCBGA
FPGA Virtex-5 FXT Family 65nm Technology 1V 665-Pin FCBGA
FPGA Virtex-5 FXT Family 65nm Technology 1V 665-Pin FCBGA
FPGA XC4000 Family 3K Gates 100 Cells 100MHz CMOS Technology 5V 120-Pin CPGA
FPGA XC3000 Family 4.5K Gates 224 Cells 135MHz 5V 160-Pin PQFP
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