This website uses cookies. By using this site, you consent to the use of cookies. For more information, please take a look at our Privacy Policy.
Home > Wiki encyclopedia > BUFGCE


A Xilinx® primitive which is basically used for clock management. Global clock buffer is gated with a clockenable signal. If clock enable is disabled the clock will also be disabled.


FPGA Tutorial Lattice FPGA
Need Help?


If you have any questions about the product and related issues, Please contact us.