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DDR3

DDR3 is a computer memory specification. It belongs to the SDRAM family of memory products, provides higher operating performance and lower voltage than DDR2 SDRAM, is the successor of DDR2 SDRAM (synchronous dynamic dynamic random access memory) (increased to eight times), and is now Popular memory product specifications.

DDR3

Introduction to Technology

CWD is used for write delay. Reset provides a command for super power saving function, which can stop the operation of DDR3 SDRAM memory particle circuit and enter super power saving standby mode. ZQ is a new terminal resistance calibration function. This line pin provides ODCE (On Die Calibration Engine) to calibrate ODT (On Die Termination) internal termination resistance, new SRT (Self-Reflash Temperature) programmable temperature control memory clock function, the addition of SRT allows The memory particles are optimized in temperature, clock and power management. It can be said that the power management function is done in the memory, and the stability of the memory particles is greatly improved to ensure that the memory particles are not too high. It caused a burnout situation. At the same time, DDR3 SDRAM also added the PASR (Partial Array Self-Refresh) partial bank refresh function, which can be said to do more effective data reading and writing for the entire memory bank to achieve power saving.

New design

1. 8bit prefetch design, and DDR2 is 4bit prefetch, so that the frequency of the DRAM core is only 1/8 of the equivalent data frequency, and the core operating frequency (core frequency) of DDR3-800 is only 100MHz.

2. Adopt point-to-point topology architecture to reduce the burden of address/command and control bus.

3. Using a production process below 100nm, the working voltage is reduced from 1.8V of DDR2 to 1.5V, and asynchronous reset (Reset) and ZQ calibration functions are added.

Compared with DDR2

1. Burst Length (BL): Since the prefetch of DDR3 is 8bit, the burst transmission period (Burst Length, BL) is also fixed at 8, and for DDR2 and early DDR architecture systems, BL=4 is also Commonly used, DDR3 adds a 4bitBurst Chop (burst mutation) mode for this, that is, a BL=4 read operation plus a BL=4 write operation to synthesize a BL=8 data burst transmission, The burst mode can be controlled by the A12 address line. And it should be pointed out that any burst interrupt operation will be prohibited in DDR3 memory and not supported, and replaced by more flexible burst transmission control (such as 4bit sequential burst).

2. Addressing Timing: Just as the number of delay cycles increases after DDR2 transitions from DDR, the CL cycle of DDR3 will also increase compared to DDR2. The CL range of DDR2 is generally between 2 and 5, while DDR3 is between 5 and 11, and the design of the additional delay (AL) has also changed. The range of AL for DDR2 is 0~4, while AL for DDR3 has three options, namely 0, CL-1 and CL-2. In addition, DDR3 also adds a new timing parameter-write delay (CWD), this parameter will be based on the specific operating frequency.

3. New reset function of DDR3: Reset is an important function newly added by DDR3, and a pin is specially prepared for this purpose. The DRAM industry requested this feature long ago, and now it is finally implemented on DDR3. This pin will make the initialization process of DDR3 simple. When the Reset command is valid, DDR3 memory will stop all operations and switch to the least active state to save power. During Reset, most internal functions of DDR3 memory will be turned off, all data receiving and transmitters will be turned off, all internal program devices will be reset, DLL (Delayed Phase Locked Loop) and clock circuits will stop working, and ignored Any activity on the data bus. In this way, DDR3 will achieve the most power-saving purpose.

4. DDR3 adds ZQ calibration function: ZQ is also a new pin, a 240 ohm low-tolerance reference resistor is connected to this pin. This pin uses a command set to automatically verify the on-resistance of the data output driver and the end resistance of the ODT through the on-die calibration engine (ODCE). When the system issues this instruction, it will use the corresponding clock cycle (512 clock cycles after power-up and initialization, 256 clock cycles after exiting the self-refresh operation, and 64 clock cycles in other cases). Recalibrate the on resistance and ODT resistance.

5. The reference voltage is divided into two: In the DDR3 system, the reference voltage signal VREF, which is very important for the operation of the memory system, will be divided into two signals, namely, VREFCA for command and address signals and VREFDQ for the data bus, which will Effectively improve the signal-to-noise level of the system data bus.

6. Point-to-point connection (Point-to-Point, P2P): This is an important change to improve system performance, and it is also a key difference between DDR3 and DDR2. In a DDR3 system, a memory controller only deals with one memory channel, and this memory channel can only have one slot. Therefore, there is a point-to-point (P2P) relationship (single physical bank) between the memory controller and the DDR3 memory module Module), or point-to-two-point (P22P) relationship (module with dual physical banks), which greatly reduces the load of address/command/control and data bus. In terms of memory modules, similar to the DDR2 category, there are also standard DIMM (desktop PC), SO-DIMM/Micro-DIMM (notebook computer), FB-DIMM2 (server), of which the second generation FB-DIMM AMB2 (Advanced Memory Buffer) with higher specifications will be used. DDR3 for 64-bit architecture obviously has more advantages in frequency and speed. In addition, because DDR3 uses other functions such as automatic self-refresh and partial self-refresh according to temperature, DDR3 is much better in terms of power consumption. Therefore, it may be welcomed by mobile devices first, just like the first to welcome DDR2 memory is not a desktop but a server. In the field of PC desktops with the fastest CPU external frequency improvement, DDR3 has a bright future. Intel's new chip, Bear Lake, will support the DDR3 specification, and AMD also expects to support both DDR2 and DDR3 specifications on the K9 platform.

Memory improvements

Number of logical banks

There are 4Bank and 8Bank designs in DDR2 SDRAM, the purpose is to cope with the needs of future large-capacity chips. And DDR3 is likely to start from 2Gb capacity, so the initial logical bank is 8, and it is also ready for the future 16 logical banks.

Packages

DDR3 will increase in pins due to some new functions. 8-bit chips are packaged in 78-ball FBGA, 16-bit chips are packaged in 96-ball FBGA, and DDR2 is available in 60/68/84-ball FBGA packages. And DDR3 must be in a green package and must not contain any harmful substances.

Reduce power consumption

While DDR3 memory reaches high bandwidth, its power consumption can be reduced. Its core operating voltage is reduced from 1.8V of DDR2 to 1.5V. Related data predicts that DDR3 will save 30% of power consumption than current DDR2. Of course, we also generate heat no need to worry. To balance the bandwidth and power consumption, compared with the existing DDR2-800 products, the power consumption ratios of DDR3-800, 1066 and 1333 are 0.72X, 0.83X and 0.95X respectively, not only the memory bandwidth is greatly improved, but the power consumption performance Also better than the previous generation.

Performance advantages

(1) Less power consumption and calorific value: Draw lessons from DDR2, reduce energy consumption and calorific value on the basis of cost control, making DDR3 more easily accepted by users and manufacturers.

(2) Higher operating frequency: due to lower energy consumption, DDR3 can achieve higher operating frequency, to a certain extent make up for the shortcomings of long delay time, and at the same time can also be used as one of the selling points of graphics cards. This is combined with DDR3 memory There is already performance on the graphics card.

(3) Reduce the overall cost of the graphics card: DDR2 memory particles are mostly 16M X 32bit, which requires 8 chips with 128MB of common memory used in high-end graphics cards. The DDR3 memory particles are mostly 32M X 32bit, and the capacity of a single particle is larger, 4 can constitute 128MB of memory. In this way, the PCB area of the graphics card can be reduced, and the cost can be effectively controlled. In addition, after the number of particles is reduced, the power consumption of the memory can be further reduced.

(4) Good versatility: Compared with DDR to DDR2, DDR3 has better compatibility with DDR2. Since the key features such as pins and packaging remain unchanged, DDR3 memory can be used with a slight modification of the DDR2 display core and the public version of the graphics card, which is of great benefit to manufacturers in reducing costs.

DDR3 has been widely used in most new high-end graphics cards. Many low-end graphics cards also use DDR3 memory.

Development History

DDR3 declared in 2002

As early as June 28, 2002, JEDEC announced the development of the DDR3 memory standard, but from the situation of 2006, DDR2 has just begun to spread, and the DDR3 standard is not even seen. However, many manufacturers have come up with their own DDR3 solutions, and have announced the successful development of DDR3 memory chips, from which we seem to feel the pace of DDR3 approaching. From the point of view that there are already chips that can be produced, the standard design work of DDR3 is nearing completion.

DDR3 market share will reach 55% in 2008

Semiconductor market research agency iSuppli predicts that DDR3 memory will replace DDR2 as the mainstream product in the market in 2008. iSuppli believes that DDR3 market share will reach 55% at that time. As of the end of November 2008, this expectation is still relatively accurate. The market has occupied a lot of DDR3 memory with operating frequencies of 1066, 1333, 1600, or even 2000MHz. There are two types of interfaces: 204 and 240 PIN. However, in terms of specific design, the basic architecture of DDR3 and DDR2 are not fundamentally different. From a certain point of view, DDR3 is a product spawned to solve the limitations faced by the development of DDR2.

New features of DDR3 memory

Due to various deficiencies of DDR2 memory, which restricts its further widespread application, the emergence of DDR3 memory is just to solve the problems of DDR2 memory, specifically:

Higher external data transfer rate

Topological architecture of more advanced address/command and control bus

Reduce energy consumption while ensuring performance

To meet these requirements, the main improvements made by DDR3 memory based on DDR2 memory include:

8bit prefetch design, DDR2 is 4bit prefetch, so that the frequency of the DRAM core is only 1/8 of the interface frequency, and the core operating frequency of DDR3-800 is only 100MHz.

Adopt the point-to-point topology architecture to reduce the burden of address/command and control bus.

In 2009, the capacity of a single PC memory stick has reached an astonishing 32GB

At the end of the winter of 2009, Samsung officially launched the world's largest single-density DDR3 chip, based on the 50-nanometer manufacturing process, pushing the single-chip capacity to 4Gb, which finally allows us to enter the era of 64-bit faster, because The capacity of a single PC memory stick has reached an astonishing 32GB. The new chip has 40% lower power consumption than the previous DDR3 chip,

Secondly, it also cleared the obstacles for the listing of a single 32GB memory module. The 32GB RDIMM memory initially available in the server field was packaged on both sides (each side is composed of 4×4GDDR3 chips), and it will face the desktop market. Provide 8G UDIMM memory for workstations and PC platforms, and 8GB SO-DIMM notebook memory. The new low-power DDR3 memory design operating voltage is 1.35V, which is about 20% lower power consumption than the previous 1.5V DDR3 chip, while the maximum throughput speed reaches 1.6Gbps. In addition, the price of DDR2 may still be weak. I wonder if my book should be upgraded to DDR2 4GB? According to IDC's forecast, the DDR3 memory market share will reach 72% from 29% by 2011.

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