PIE(Physical Interconnect Editor)
FPGA XC3000 Family 4.5K Gates 224 Cells 100MHz 5V 132-Pin PPGA
CPLD CoolRunner -II Family 1.5K Gates 64 Macro Cells 159MHz 0.18um Technology 1.8V 48-Pin QFN EP
CPLD CoolRunner -II Family 1.5K Gates 64 Macro Cells 159MHz 0.18um Technology 1.8V 100-Pin VTQFP
FPGA Virtex Family 236.666K Gates 5292 Cells 333MHz 0.22um Technology 2.5V 256-Pin BGA
FPGA Virtex Family 236.666K Gates 5292 Cells 333MHz 0.22um Technology 2.5V 456-Pin FBGA
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