OP(Operation Point)
FPGA Virtex-II Family 1.5M Gates 17280 Cells 750MHz 0.15um Technology 1.5V 896-Pin FCBGA
FPGA Virtex-II Family 1.5M Gates 17280 Cells 820MHz 0.15um Technology 1.5V 575-Pin BGA
FPGA XC3000 Family 4.5K Gates 224 Cells 100MHz 5V 132-Pin PPGA
CPLD CoolRunner -II Family 1.5K Gates 64 Macro Cells 159MHz 0.18um Technology 1.8V 48-Pin QFN EP
CPLD CoolRunner -II Family 1.5K Gates 64 Macro Cells 159MHz 0.18um Technology 1.8V 100-Pin VTQFP
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