MPLD(Mask PLD) Mask programmable logic device.
FPGA Spartan-XL Family 20K Gates 950 Cells 250MHz 3.3V 144-Pin TQFP
Xilinx PLCC84
FPGA Virtex-II Family 1.5M Gates 17280 Cells 750MHz 0.15um Technology 1.5V 575-Pin BGA
FPGA Virtex-II Family 1.5M Gates 17280 Cells 750MHz 0.15um Technology 1.5V 676-Pin FBGA
FPGA XC3000 Family 4.5K Gates 224 Cells 100MHz 5V 84-Pin PLCC
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