JEDEC, the Solid State Technology Association, is the leading standards body for the microelectronics industry. In the past 50 years, the standards set by JEDEC have been accepted and adopted by the whole industry. As a global organization, the membership of JEDEC is transnational. JEDEC is not affiliated with any country or government entity.
JEDEC's standard-setting process brings manufacturers and suppliers together, and completes the mission of standard-setting through 50 committees and sub-committees to meet the diverse industrial development and technical needs. JEDEC has nearly 300 member companies, including almost all the top 100 companies in the industry.
The main functions of JEDEC include terms, definitions, product feature description and operation, test methods, production support functions, product quality and reliability, mechanical form factor, solid-state memory, DRAM, flash memory cards and modules, and radio frequency identification (RFID) tags. Determination and standardization. In addition, JEDEC also manages a service for product registration for manufacturers of separate solid products under a type guidance system.
JEDEC was established in 1958 as part of the Electronic Industries Association Alliance (EIA) to set standards for the emerging semiconductor industry. In 1999, JEDEC became an independent association and was renamed: JEDEC Solid State Technology Association. Promoting the development of voluntary standards that are open, accessible, and quickly completed remains the core business of JEDEC. The JEDEC committee leads the development of industry standards in a wide range of technical fields, including joint development of standards with other organizations.
In order to fulfill the mission of formulating open world universal standards for the microelectronics industry, JEDEC pursues several principles:
Open and Voluntary Standards: All JEDEC standards are open and voluntary, with the purpose of promoting competition and cooperation between companies that are conducive to competition worldwide. The JEDEC standard does not favor one country or region and discriminate against other countries or regions. JEDEC has developed and maintained more than 1,000 standards and published documents. All standards and documents can be downloaded for free through its official website. One company with one vote and two-thirds majority system: In the JEDEC voting process, a company, regardless of its company size and influence, has only one vote. Standards can only be adopted when the committee has passed a two-thirds majority vote. All standards are ultimately approved by the Council by vote; approval requires a 75% majority vote. These related principles can reduce the risk of JEDEC standard setting procedures being controlled by any company or group of companies. These principles can also avoid the adoption of marginal standards and ensure that the formation of all JEDEC standards is based on broad industry consensus. The end result is that the JEDEC standard is easier to gain widespread adoption in the market. Patent management: JEDEC and its members adhere to strict patent policies. Individuals participating in the committee’s standards development process must disclose all known patents and patent applications related to the standards being established. After a patent or patent application is disclosed, JEDEC needs to ask the patent holder for a "reasonable and non-discriminatory" (RAND) authorization guarantee or bypass the patent. The principle of JEDEC is to formulate standards that do not contain patents. High efficiency and easy access: JEDEC has established a set of high-efficiency procedures to set standards and release them to the market. When necessary, the JEDEC standard can be completed within a short period of 60-90 days. All JEDEC standards can be downloaded for free from its official website. Most standards organizations support operations by selling their printed or online standards. JEDEC is the first organization in the world to fully open all its standards through the Internet. Anyone anywhere can download the JEDEC standard for free via the Internet. This is one of the reasons why engineers and designers from all over the world rely on JEDEC standards and publications.
Membership and governance
Any company or organization that is engaged in the production or service of electronic equipment and electronic related products by itself or through related entities is eligible to become a member. A company may appoint a main member and an unlimited number of alternate members to participate in the selected committee.
The governing body of JEDEC is the council of the association. The Council consists of individual representatives (or their substitute representatives) representing member companies. All fully paid member companies that have been members of JEDEC for the past two consecutive years can be considered as members of the board of directors. In any case, having relevant technical capabilities is a prerequisite for becoming a JEDEC member.
Type registration
JEDEC also manages a type registration project for solid-state products. This project was established by the JEDEC committee in 1958. The electrical, mechanical and thermal characteristics of semiconductor devices can be registered through the JEDEC office. The JEDEC office maintains archive materials of 15,000 registered devices. This system enables manufacturers to mark the unique characteristics of their devices and to ensure that devices marked with the same specified code meet a recognized minimum specification, regardless of the source of production.
JEDEC publication
As a result of various activities, JEDEC released a wide range of documents, which involved the following aspects:
-Standard,
-Publications,
-Guidance documents,
-Registration data format (RDF),
-Registered form,
-Standard shape,
-Specifications, and
-ANSI files.
In addition, JEDEC also has e-mail newsletters such as registration information release and regular updates of various services for subscription.
2. JEDEC Committee JEDEC Committee and Subcommittee
The JEDEC Council is responsible for establishing appropriate committees to engage in standardization activities. These committees are given responsibilities for products or services. Technical and information exchanges can be carried out directly between the committees and their contacts. The main responsibilities of the committees are to propose standards and formulate policies, procedures, formats and other documents, and then submit them to the council for voting or approval.
The Service Committee is concerned about issues affecting the development of the industry, regardless of the type of solid-state product line the issue involves. Its activities include package appearance, terms and definitions, government standards, and international standards.
The Product Committee is concerned about technical issues in the designated product area. For example, test methods, device specification formats, and minimum configurations, pinouts, interface requirements, and applications.
Service Committee
JC-10 committee: terms, definitions, and symbols
Activities in the JC‑10 business area include the identification, coordination, and review of terms, definitions, and symbols related to separate devices, integrated circuits, modules, and various semiconductor manufacturing support functions. The committee also assists in the establishment and standardization of model designation systems. To perform these functions, the committee maintains contact with other groups and uses technical information from these groups. These groups include other JEDEC committees, national and international standards and professional organizations.
JC-11 Committee: Standardization of machinery (package outline)
JC-11's business scope includes the development of design guidance documents; standard measurement methods for determining mechanical characteristics, standard and registered mechanical shapes of microelectronic packages and components, corresponding slot shapes, mechanical, environmental and ergonomic performance specifications, Pin and pad layout; and preparation of semiconductor device packaging instruction code. In order to perform the above functions, the committee provides technical support and design suggestions for parameter setting and definition to ensure the mechanical interchangeability of components. Other materials that may affect product shape, mating, function, and reliability, surface treatment, and toughness are also included. These components are limited to the products listed below: separation circuits, monolithic circuits, multi-chip circuits, and hybrid circuits; microcircuit modules; mid-level package brackets and containers; unpackaged devices; and specific assembly and manufacturing projects related to packaging. The committee maintains contact with other JEDEC committees and external organizations engaged in the standardization of similar machinery.
· JC-11.1 Subcommittee: Editorial Affairs and Procedures
Review, correct and finalize the voting documents and appearances to be circulated and officially released.
· JC-11.2 Subcommittee: Design Requirements
Guidelines and methods for determining the expected dimensions and deviations for various types of packaging and related projects (JEDEC 95-1 standard, design manual); coding for semiconductor device packaging (JEDEC No. 30 standard, descriptive code system for semiconductor device packaging)
· JC-11.4 Subcommittee: No Package Devices
Determining the mechanical profile for unpackaged devices mainly includes but is not limited to the following configurations: unpackaged separation or integrated circuits, flip chip, beam lead and tape mount, and normal size chips.
· JC-11.5 Subcommittee: Encapsulated Interface (Inactive)
Provide mechanical profiles for device testing and transportation media, such as test carriers, matrix trays, transportation pipes, test sockets, and contactors.
· JC-11.7 Subcommittee: IEC Interface
Coordinate with the SC47D group of the International Electrotechnical Commission (IEC) on mechanical appearance matters.
Information for reference only:
IEC SC47D: Mechanical standardization of semiconductor devices
· WG-1 — Package outline
Tasks include drawing outline drawings to ensure mechanical interchangeability, automated processing, and installation.
· WG-2 — Terms, definitions, practices and procedures
The tasks include the determination of terms, definitions and symbols, coordination and review. In addition, the working group also determined the drawing format and dimensions and deviation annotation methods.
· Subcommittee JC-11.10: Microelectronics Ceramic Packaging
Determine the mechanical shape of the ceramic package.
· Subcommittee JC-11.11: Microelectronics Plastic Packaging
Determine the mechanical shape of the plastic package.
· Subcommittee JC-11.13: Pressure gauges and tools for semiconductor packaging and related components (inactive)
To verify unpackaged devices, semiconductor packages, and package interface media, determine the recommended mechanical measurement methods, mechanical pressure gauges, fasteners, and laminates.
· JC-11.14 Subcommittee: Microelectronic Components
Determine the mechanical shape for the assembly of microelectronic packages.
JC-13 Committee: Government Liaison
The JC-13 committee is responsible for the standardization of quality and reliability implementation methods for solid-state products that require special-purpose conditions and functions that exceed commercial standards in military, aerospace, and other environments. This includes long-term reliability and special screening requirements.
Implementation:
The purpose of the JC-13 committee is to provide member companies and their customers with a unified, cost-effective, proven, and approved method for determining and evaluating special-purpose products to achieve the purpose of improving product performance and reliability. The activities of the committee's business scope include the formulation, coordination and maintenance of standard documents on product quality and reliability, system verification and process management. The committee also supports similar related documents developed and maintained by other organizations. To achieve this goal, the committee maintains contact with customers, other JEDEC committees, government agencies, and interested parties with special application needs.
· JC-13.1 Sub-Committee: Separating Devices
Provide technical support and advice to the Department of Defense on environmental and electrical test methods and procedures for separating solid electronic components. The subcommittee also develops quality assurance systems and methods.
· JC-13.2 Subcommittee: Microelectronic Devices
Provide technical support and advice to the United States and space agencies on the electrical, environmental, and quality and reliability testing methods of microelectronic devices. The committee members provide technical support in quality and reliability engineering, environmental and simulation testing, electronic design and wafer manufacturing, and assembly and testing technologies. .
· JC-13.4 Subcommittee: Radiation Hardness: Guarantee and Characterization
Keep in touch with component manufacturers, users, and government agencies on all issues related to characterization of radiation hardness assurance of solid-state devices. All technical issues concerning the performance specifications, standards and test methods of solid-state devices in a radiated environment are within the scope of the subcommittee’s business. The subcommittee seeks advice and support from relevant experts to promote uniform standards, methods and specifications accepted by manufacturers, users and government agencies. The subcommittee provides a forum where manufacturers’ capabilities can be discussed.
· JC-13.5 Sub-Committee: Hybrid, RF/Microwave and Multi-chip Module Technology
Provide technical support and standard formulation for hybrid microcircuits, RF/microwave, and multi-chip modules for commercial, industrial, military, and aerospace applications. Its business also includes terminology and definitions related to hybrid microcircuits, radio frequency/microwave, and multi-chip module technologies, specification review, formulation of new specification standards, and maintenance of existing standards. In order to perform these functions, the subcommittee maintains contact with other JEDEC committees, government agencies, industry, various professional organizations, participating members, and conference guests and absorbs their technical information.
JC-14 Committee: Quality and reliability of solid products
The JC-14 committee is responsible for the standardization of quality and reliability technologies for commercial solid-state products. These areas include: computers, automobiles, communications equipment, etc. Its business also includes the development of board-level reliability standards for solid-state products in commercial equipment.
Implementation:
The purpose of the committee is to use information and technology related to existing resources to determine the goals for measuring and improving reliability, and to promote communication and communication between suppliers and user groups. The composition of the committee includes both suppliers and users. The committee provides a forum to address industry issues regarding the quality and reliability of solid-state devices. The committee maintains liaison with other JEDEC committees related to quality and reliability issues. In addition, the committee coordinates activities with other standards organizations such as IPC, EIA, IEC, and JEITA to develop industry and world standards.
· JC-14.1 Subcommittee: Test Methods for Reliability of Packaged Devices
Determine a unified method and procedure for the reliability evaluation of packaged solid-state devices. The subcommittee develops and publishes test methods for determining the reliability of packaged devices, and determines physical, electrical, mechanical, and environmental conditions for packaged device testing. The composition of the subcommittee includes both suppliers and users. It provides a forum to address industry issues regarding solid-state device testing practices. It performs its functions in cooperation with other JEDEC committees that determine electrical and mechanical conditions.
· JC-14.2 Subcommittee: Wafer Level Reliability
Draft, review and determine specifications and standards for semiconductor device wafer-level reliability or wear assessment. All technical issues related to wafer-level reliability and wear assessment, including terms, definitions, specifications, standards, test methods, etc., are within the scope of the subcommittee’s business. To perform these functions, the subcommittee maintains contact with other groups and technical experts and uses information and help from them. The team also provided a forum to discuss wafer-level issues related to wear and reliability assessment.
· JC-14.3 Subcommittee: Reliability Evaluation and Monitoring of Silicon Devices
Responsible for formulating standards and procedures to evaluate and report on the reliability of solid-state devices and subassemblies in commercial applications. This includes but is not limited to identification, monitoring, and field reliability.
· JC-14.4 Sub-Committee: Quality Process and Method
Develop, publish, and maintain standards and publications for solid-state industry quality processes and methods. The subcommittee is composed of supplier and customer representatives and coordinates actions with other organizations to reduce duplication of standard setting activities.
· JC-14.6 Subcommittee: Failure Analysis
Formulate standards and procedures for failure analysis to enhance mutual understanding between customers and suppliers, and promote the development of the entire industry by shortening analysis time and improving success rate. The subcommittee maintains close contact with other JC14 committee subcommittees and external organizations that may influence decisions or actions and engage in related standardization activities. It uses fair and equitable procedures to ensure that its decisions are widely accepted. Its business management system ensures the effectiveness of its work and keeps pace with industry needs.
· JC-14.7 Subcommittee: Reliability and Quality Standards of GaAs
The subcommittee provides a forum to collect and disseminate information about the quality and reliability of solid-state devices and integrated circuits. It is committed to promoting the standardization of terms, definitions, product characterization, and test methods. The results of this group's work include but are not limited to the following standards and publications in various fields:
In addition to standardization work, the subcommittee may also host seminars and establish databases. The subcommittee operates in accordance with the appropriate electronic industry alliance and JEDEC regulations and rules, and complements the work of the JC-14 committee and its subcommittees.
JC-15 Committee: Thermal Characterization Technology of Semiconductor Packaging
The committee's business scope includes standardization of thermal characterization techniques, testing and modeling of electronic packaging, components, and semiconductor device materials. These standards will meet the following conditions:
· These standards will be meaningful, consistent, and proven to be scientifically feasible.
· These standards will provide a uniform method for microelectronic package users to compare thermal phenomena. .
The committee develops test standards for semiconductor packaging, including:
-Related terms and definitions,
- testing method,
- Test Conditions,
-Test environmental conditions,
-Test parameters for modeling and modeling tools, and
-Specific testing techniques (including calibration of measuring tools).
The committee also develops model standards for semiconductor packaging, including:
-Related terms and definitions,
-Neutral file format for thermal modeling parameter exchange
-Modeling program,
-Model verification procedures and reporting requirements, and
-Experimental verification method.
The JC-15 committee maintains contact with other JEDEC committees and industry-wide activities to ensure that the committee's work is effective and suitable for the needs of industry development.
JC-16 Committee: Interface Technology
The business scope of the JC-16 committee includes the development of power supply voltage specifications for digital integrated circuits and the definition of electrical interfaces for various components in the system. The committee's business scope also includes interface protocols, modeling, simulation, test environment, and verification. JC-16 also presides over the formulation of general operating environment specifications for JC-40, JC-42 and JC-45. The committee maintains contact with other JEDEC committees and appropriate external organizations in order to develop standards and promote the activities of the committee to gain wide recognition.
Note: All standards development work that requires electrical interfaces must be approved by the JC-16 committee and the appearance code of the JC-11 committee. (Resolution 08/07 of the JEDEC Council).
Product Committee
JC-22 Committee: Diodes and Thyristors
The business scope of the JC-22 committee includes all semiconductor rectifier diodes and thyristors, as well as small signals, regulation, reference, pin, modulation varactor diodes, avalanche fault diodes (ABD), transient voltage suppressors (TVS), polymerization ESD suppressor (PES), avalanche rectifier (ABD), metal oxide varistor (MOV), all selenium rectifiers, all amorphous thyristor trigger diodes, and assemblies, including all modules using these devices, regardless of installation method, Voltage level and packaging method. Specific business includes the standardization of registration formats, test methods and procedures, and industry coordination for rectifiers, rectifier diodes, thyristors, and transient voltage suppressors. The committee maintains contact with other professional and national and international organizations for necessary technical information and data exchange. The committee also provides assistance in determining relevant terms, symbols, and definitions.
The committee is divided into the following subcommittees to deal with various product issues within the business scope:
· JC-22.1 Sub-Committee: Thyristor
· JC-22.2 Sub-Committee: Rectifier Diode
· JC-22.4 Sub-Committee: Signal and Regulator Diode (combined with JC-22.2)
· JC-22.5 Subcommittee: Transient Voltage Suppressor
JC-25 Committee: Transistor
The business scope of the JC-25 committee includes all silicon transistors, such as bipolar transistors, field effect transistors and insulated gate transistors, as well as all smart power devices. The definition of a smart device is a semiconductor device consisting of a hybrid or single-chip device, with signal conditioning and power control functions, including fault management and diagnosis. They are able to provide at least 1 amp peak current output rating (sum of multiple outputs) and have a supply voltage and output load voltage rating of at least 30 volts.
The specific business includes the determination of the registration format, the standardization of test methods and procedures, and the industrial coordination of the above products. The committee maintains contact with other professional and national and international organizations for necessary technical information and data exchange. The committee also provides assistance in determining relevant terms, symbols, and definitions.
JC-40 Committee: Digital Logic
The business scope of the JC-40 committee includes all digital integrated circuits regardless of manufacturing technology. The committee determines test parameters and measurement methods, as well as the registration format to promote the standardization of type codes. In order to perform the above functions, the committee cooperates with other JEDEC committees and external organizations on terms and definitions, mechanical standardization, international standardization, and government liaison. The committee also maintains liaison with various user organizations to promote the widespread application of its work.
· JC-40.1 Sub-Committee: Digital Logic Product Family and Application
The business scope of the JC-40.1 subcommittee includes all standard logic family products, except for products that mainly target clock distribution. The subcommittee's business includes the standardization of data sheets, applications, test procedures, simulation environments, and package pinouts for logic family products.
· JC-40.3 Subcommittee: Registered Dual-Line Memory Module (RDIMM) Support Parts
The products of the JC-40.3 Subcommittee's business scope include logic, clock, and general phase-locked loop (PLL) devices, which are used for two-wire memory modules with registers or other general-purpose applications.
· JC-40.4 Subcommittee: Fully Buffered Dual-Line Memory Module (FBDIMM) Support Components
Products in the JC-40.4 business range include buffer devices for fully buffered two-wire memory modules and other general-purpose applications.
· JC-40.5 Subcommittee: Logic Verification and Validation
JC-40.5 is responsible for the testing requirements and methods of logic components, including test boards/clamps to confirm compliance with specifications.
JC-42 Committee: Solid State Memory
Products in the JC‑42 business scope include all memory integrated circuits and programmable logic devices, whether static or dynamic, or regardless of manufacturing technology and applications. For example, large static and dynamic random access memory (RAM), read-only memory (ROM), electronically erasable programmable read-only memory (EEPROM) and programmable logic device (PLD). Business activities include determining technical information and standards regarding pinouts, operating characteristics (including read and write algorithms), test parameters, characterization, and registration formats. The committee maintains contact with other JEDEC committees and external organizations to promote the broad implementation of its decisions. The JC-42 committee includes the following subcommittees:
· JC-42.2 Subcommittee: Static Random Access Memory (SRAM)
The subcommittee is responsible for the standardization of all aspects of separating SRAM from memory with functions similar to SRAM. Such as static random access memory (SRAM) and pseudo static random access memory (Psedo SRAM) products.
· JC-42.3 Subcommittee: Dynamic Random Access Memory (DRAM)
This sub-committee is responsible for the development of standards for all DRAM products, and its main purpose is to maximize performance. For example, it is used in high-performance and power applications including dynamic random access memory (DRAM) and graphics random access memory such as servers, workstations and laptops.
l JC-42.3B Alphabet Committee on DRAM functions and features
Responsible for formulating the function and feature standards of all products within the scope of the JC-42.3 subcommittee.
l JC-42.3C Alphabet Committee on DRAM timing
Responsible for formulating timing and parameter standards for all products in the JC-42.3 business scope.
l JC-42.3D Letter Committee About DRAM pin leads
Responsible for formulating pin lead standards for all products in the JC-42.3 business scope.
l JC-42.4 Subcommittee: Non-Volatile Memory Devices
The subcommittee is responsible for the development of non-volatile memory devices, in addition to the JC-42.6 subcommittee is responsible for all aspects of standards. For example, flash memory standards.
l JC-42.6 Subcommittee: Low Power Memory
The subcommittee is responsible for formulating standards for random access memory (RAM) and non-volatile memory (NVM) with the main purpose of reducing power consumption. For example: Compatible In-Place Execution (XiP) bus low-power dynamic random access memory (LPDRAM) and non-volatile memory devices mainly used in battery-driven handheld applications including mobile phones, PDAs, etc.
JC-45 Committee: DRAM module
The JC-45 committee is responsible for setting standards for interfaces such as DRAM modules, cards, and slots. These standards are designed to address the architectural, electrical, testing, and serial register detection (SPD) issues of commercial memory design and manufacturing.
Note The definition of a memory module is that one or more printed circuit boards mainly contain multiple memories, logic, and passive devices in a planar or three-dimensional layout.
· JC-45.1 Subcommittee: Registered DRAM Module (RDIMM)
The JC-45.1 subcommittee is responsible for formulating the standard for socketed DRAM modules with registers. These standards mainly address architecture, electrical, and test issues related to commercial memory design and production. The reference design board file has been provided and registered.
· JC-45.2 Subcommittee: DRAM Module (UDIMM) without Buffer
The JC-45.2 subcommittee is responsible for formulating the standard for socket DRAM modules without buffers. These standards mainly address architecture, electrical, and test issues related to commercial memory design and production. The reference design board file has been provided and registered.
· JC-45.3 Subcommittee: Small DRAM Module
The JC-45.3 subcommittee is responsible for the development of small-size socket DRAM modules. These standards mainly address architecture, electrical, and test issues related to commercial memory design and production. The reference design board file has been provided and registered.
· JC-45.4 Subcommittee: Fully Buffered DRAM Module (FBDIMM)
The JC-45.4 subcommittee is responsible for formulating the standard of fully buffered socket DRAM modules. These standards mainly address architecture, electrical, and test issues related to commercial memory design and production. The reference design board file has been provided and registered.
l JC-45.5 Subcommittee: Module Interconnection
The JC-45.5 sub-committee is responsible for formulating module interconnection standards, including sockets. These standards, developed and published for AC performance requirements, include test methods and test boards to confirm compliance with specifications.
JC-63 Committee: Multi-chip packaging
Define or recommend mixed technology multi-chip packaging standards. These standards address the unique electrical, mechanical, test, and architectural issues of design and manufacture between commercial wafers.
Note The definition of multi-chip package (MCP) is that a package contains multiple chips, including storage-storage, logic-storage, logic-logic and passive devices.
JC-64 Committee: Embedded memory and pluggable memory card
The committee defines or recommends standards for embedded memory and pluggable memory cards. These memories and pluggable memory cards are mainly aimed at, but not limited to solid-state flash memory technology. They all use an electrical and protocol abstraction layer that is independent of storage technology. The committee standardizes electrical interface specifications, command protocols, mechanical form factors, and host controllers. The committee is also responsible for determining methods and procedures for quality, reliability and durability. The proposed documents (shape, test methods, procedures, etc.) will be provided by relevant JEDEC committees such as JC-11, JC-14 and JC-16, and if necessary, external standards organizations to provide technical support and approval.
l JC-64.1 Subcommittee: Electrical Specifications and Order Agreement
Define/recommend standards for embedded memory and pluggable memory cards. Standardize electrical interfaces and command protocols. The subcommittee is also responsible for the determination of quality, reliability and durability methods and procedures. The applicable part will be completed in cooperation with other subcommittees of the JC-64 committee. The proposed documents (shape, test methods, procedures, etc.) will be provided by relevant JEDEC committees such as JC-11, JC-14 and JC-16, and if necessary, external standards organizations to provide technical support and approval.
l JC-64.2 Subcommittee: Shape, connection (mechanical shape) and climate and environmental methods
Define/recommend standards for the shape, mating (mechanical form) and climate/environment (quality, reliability, and durability) of embedded memory and pluggable memory cards. Projects developed include but are not limited to mechanical profiles, test methods, and quality and reliability procedures. The applicable part will be completed in cooperation with other subcommittees of the JC-64 committee. The proposed documents (shape, test methods, procedures, etc.) will be subject to relevant JEDEC committees such as JC-11, JC-14, and JC-16, etc. If necessary, technical support and approval from external standards organizations are also required.
l JC-64.3 Subcommittee: Host Controller
Define/recommend standards for JC-64 business host device controllers. In order to implement the general software driver installation, the register set (square question, control), related direct memory access (DMA) function, interrupt, buffer/first in first out (FIFO) and other related details are standardized. The applicable part will be completed in cooperation with other subcommittees of the JC-64 committee. The proposed documents (shape, test methods, procedures, etc.) will be subject to relevant JEDEC committees such as JC-11, JC-14, and JC-16, etc. If necessary, technical support and approval from external standards organizations are also required.
l JC-64.8 Subcommittee: Solid State Drive
Definitions and recommended standards for solid-state drives for embedded or pluggable storage using existing storage infrastructure. The scope of this subcommittee includes the use of existing interface standards (command protocols and electrical interfaces) to define new form factors, mechanical interconnections, environmental factors, and methods and procedures for electrical quality, reliability, and durability not included in the interface standards. The applicable part will be completed in cooperation with other subcommittees of the JC-64 committee. The proposed documents (shape, test methods, unique interface requirements and procedures, etc.) will be covered by relevant JEDEC committees such as JC-11, JC-14 and JC-16, and other external standards organizations such as T-10, T-13, Provide technical support and approval for SATA-IO, USB3.0, etc.
Note All standardization projects that require electrical interfaces must first obtain the approval of the JC-16 committee and the appearance code of the JC-11 committee before starting. (JEDEC Council Resolution 08/07)
JC-65 Committee: Radio Frequency Identification Tags (RFID)
JC-65 Committee's business scope
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