GDF(Graphic Design File)
CPLD CoolRunner -II Family 1.5K Gates 64 Macro Cells 263MHz 0.18um Technology 1.8V 48-Pin QFN EP
CPLD CoolRunner -II Family 1.5K Gates 64 Macro Cells 159MHz 0.18um Technology 1.8V 56-Pin CSBGA
Xilinx BGA
FPGA Virtex-5 FXT Family 65nm Technology 1V 1738-Pin FCBGA
FPGA Virtex-5 FXT Family 65nm Technology 1V 1738-Pin FCBGA
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