This website uses cookies. By using this site, you consent to the use of cookies. For more information, please take a look at our Privacy Policy.
Home > Wiki encyclopedia > DIP

DIP

Dual in-line package (English: dual in-line package) Also known as DIP package or DIP package, referred to as DIP or DIL, is a kind of integrated circuit packaging method, the shape of the integrated circuit is rectangular, on both sides There are two rows of parallel metal pins called pin headers. The components of the DIP package can be soldered into the through holes plated on the printed circuit board or inserted into the DIP socket.

DIP-packaged components are generally referred to as DIPn, where n is the number of pins. For example, a 14-pin integrated circuit is called DIP14, and the figure on the right is a DIP14 integrated circuit.

DIP

Introduction

DIP-packaged CPU chips have two rows of pins that need to be inserted into chip sockets with DIP structures. Of course, it can also be directly inserted into a circuit board with the same number of solder holes and geometric arrangement for soldering. DIP-packaged chips should be especially careful when plugging and unplugging from the chip socket to avoid damage to the pins. DIP package structure forms are: multilayer ceramic double in-line DIP, single layer ceramic double in-line DIP, lead frame DIP (including glass ceramic sealing type, plastic encapsulation structure type, ceramic low melting glass package type) Wait.

Application

Integrated circuits often use DIP packaging, and other commonly used DIP packaging parts include DIP switches, LEDs, seven-segment displays, bar displays and relays. Cables for computers and other electronic devices are also commonly used in DIP-packaged connectors.

Use

The earliest DIP packaging components were invented by Express Semiconductor's Bryant Buck Rogers in 1964. The first component has 14 pins, which is quite similar to today's DIP packaging components. Its shape is rectangular. Compared with earlier round components, rectangular components can increase the density of components in the circuit board. DIP-packaged components are also very suitable for automated assembly equipment. There can be dozens to hundreds of ICs on the circuit board. All parts are soldered by wave soldering machines and then tested by automatic test equipment. Only a few manual operations are required. The size of the DIP component is actually much larger than the internal integrated circuit. At the end of the twentieth century, components packaged by surface mount technology (SMT) can reduce the size and weight of the system. However, DIP components are still used in some occasions. For example, when making circuit prototypes, DIP components are used in conjunction with breadboards to make circuit prototypes to facilitate the insertion and removal of components.

DIP packaging components were the mainstream of the microelectronics industry in the 1970s and 1980s. At the beginning of the 21st century, the amount of use gradually decreased and was replaced by packages such as PLCC and SOIC. The characteristics of surface mount technology components are suitable for use in mass production, but it is more inconvenient when prototyping circuits. Because some new components only provide products that are packaged by surface mount technology, many companies produce adapters that convert SMD components into DIP packages. You can place ICs packaged in surface mount technology in adapters, like DIP The packaging components are then connected to the breadboard or other circuit prototype boards (like hole boards) that match the in-line components.

For programmable components like EPROM or GAL, DIP packaged components are still popular for some time due to the convenience of burning data from external programming devices (DIP packaged components can be directly inserted into the corresponding DIP sockets of the programming device) . However, with the popularity of online programming (ISP) technology, the benefits of DIP packaged components for easy programming are no longer important. In the 1990s, components with more than 20 pins may also have DIP-packaged products. In the 21st century, many new programmable components are already in SMT packaging, and no longer provide DIP packaging products.

Installation method

DIP packaged components can be mounted on the circuit board using through-hole insertion technology, or can be installed using DIP sockets. The use of DIP sockets can facilitate the replacement of components, and can also avoid overheating of components during soldering. Generally, the socket will be used with an integrated circuit with a larger volume or a higher unit price. Like test equipment or burners, where the installation and removal of integrated circuits are often required, zero-resistance sockets are used. DIP packaging components can also be used with breadboards, which are generally used for teaching, development design, or component design.

Structure

The packaging of dual in-line packaged chips is generally made of plastic or ceramic. Ceramic packages have good air tightness and are commonly used in equipment that requires high reliability. However, most dual in-line packaged chips use thermosetting resin plastic. A curing cycle of less than 2 minutes can produce hundreds of chips.

Number of pins and pitch

The commonly used DIP package conforms to the JEDEC standard, and the pitch (pitch) between the two pins is 0.1 inches (2.54 mm). The distance between two rows of pins (row spacing, row spacing) depends on the number of pins, the most common is 0.3 inches (7.62 mm) or 0.6 inches (15.24 mm). Other less common distances are 0.4 inches (10.16 mm) or 0.9 inches (22.86 mm). There are also some packages with a pitch of 0.07 inches (1.778 mm) and row spacing of 0.3 inches, 0.6 inches or 0.75 inches.

The DIP package used in the former Soviet Union and Eastern European countries is roughly close to the JEDEC standard, but the pitch is 2.5 mm in the metric system instead of 0.1 inches (2.54 mm) from the inch system.

The number of pins in the DIP package is always an even number. If the line spacing is 0.3 inches, the common number of pins is 8 to 24, and occasionally you will see packages with 4 or 28 pins. If the line spacing is 0.6 inches, the common number of pins is 24, 28, 32 or 40, and there are also packages with 36, 48 or 52 pins. The number of pins of the Motorola 68000 and Zilog Z180 CPUs is 64, which is the maximum number of pins commonly used in DIP packages.

Direction and pin number

When the identification notch of the component is facing upward, the top left pin is pin 1, and the other pins are sequentially numbered in a counterclockwise order. Sometimes pin 1 will be marked with a dot.

For example, for the DIP14 IC, when the identification notch is facing upward, the pins on the left are pins 1 to 7 in order from top to bottom, and the pins on the right are pins 8 to 14 in order from bottom to top.

Other derivative packages

SOIC (Small Outline IC) is a very commonly used surface mount technology packaging method, especially in consumer electronics and personal computers. SOIC can be regarded as a reduced version of the PDIC package of the standard IC, and its pin header is also on both sides of the component. The packaging methods of the SOJ (Small Outline J-lead) and SOP (Small Outline Package) series are also similar to the DIP packaging.

Features

Suitable for perforating and soldering on PCB (printed circuit board), easy to operate.

The ratio between the chip area and the package area is large, so the volume is also large.

The earliest 4004, 8008, 8086, 8088 and other CPUs all used DIP package, through which the two rows of pins can be inserted into the slots on the motherboard or soldered on the motherboard.

In the era when memory particles were directly plugged onto the motherboard, DIP packaging was once very popular. DIP also has a derivative method, SDIP (Shrink DIP), which has a pin density six times higher than that of DIP.

DIP is also the abbreviation of DIP switch, and its electrical characteristics are:

1. Electrical life: each switch is tested under a voltage of 24VDC and a current of 25mA, and can be tossed back and forth 2000 times;

2. Rated current that the switch does not switch frequently: 100mA, withstand voltage 50VDC;

3. The rated current that the switch often switches: 25mA, withstand voltage 24VDC;

4. Contact impedance: (a) initial value is 50mΩ maximum; (b) maximum value is 100mΩ after test; 5. insulation resistance: minimum 100mΩ, 500VDC;

6. Compressive strength: 500VAC/1 minute;

7. Polar capacitance: maximum 5pF;

8. Loop: Single contact single selection: DS(S), DP(L).

In addition, the digital aspect of the movie

DIP (Digital Image Processor) two-dimensional actual image

a8773912b.jpg

Use

The chip adopting this packaging method has two rows of pins, which can be directly soldered on a chip socket with a DIP structure or soldered in a solder joint with the same number of solder holes. Its characteristic is that it can easily realize the perforation welding of the PCB board, and has good compatibility with the main board. However, since the package area and thickness are relatively large, and the pins are easily damaged during insertion and removal, the reliability is poor. At the same time, due to the influence of the process, this packaging method generally does not exceed 100 pins. With the high degree of integration within the CPU, DIP packaging quickly withdrew from the stage of history. Their "footprint" can only be seen on old VGA/SVGA graphics cards or BIOS chips.

5326.jpg

ASSOCIATED PRODUCTS

  • XC3SD3400A-4FG676C

    XC3SD3400A-4FG676C

    FPGA Spartan-3A DSP Family 3.4M Gates 53712 Cells 667MHz 90nm Technology 1.2V 676-Pin FBGA

  • XC3SD3400A-5CSG484C

    XC3SD3400A-5CSG484C

    FPGA Spartan-3A DSP Family 3.4M Gates 53712 Cells 770MHz 90nm Technology 1.2V 484-Pin LCSBGA

  • XC4002A-5PC84C

    XC4002A-5PC84C

    FPGA XC4000A Family 2K Gates 64 Cells 125MHz 5V 84-Pin PLCC

  • XC2C512-7PQG208C

    XC2C512-7PQG208C

    CPLD CoolRunner -II Family 12K Gates 512 Macro Cells 179MHz 0.18um Technology 1.8V 208-Pin PQFP

  • XC4028XL-09HQ304C

    XC4028XL-09HQ304C

    FPGA XC4000X Family 28K Gates 2432 Cells 0.35um Technology 3.3V 304-Pin HSPQFP EP

FPGA Tutorial Lattice FPGA
Need Help?

Support

If you have any questions about the product and related issues, Please contact us.