Qsys is a software tool provided by Altera to build SOPC system on FPGA. It is integrated in Quartus II for the development of soft core platform. The soft core includes Nios II and corresponding peripherals.
To put it simply, Qsys can make a hardware system including CPU, bus, memory and peripherals, on which you can run programs.
CPLD CoolRunner -II Family 6K Gates 256 Macro Cells 256MHz 0.18um Technology 1.8V 144-Pin TQFP
CPLD CoolRunner -II Family 6K Gates 256 Macro Cells 152MHz 0.18um Technology 1.8V 132-Pin CSBGA
FPGA Spartan-3A Family 400K Gates 8064 Cells 770MHz 90nm Technology 1.2V 400-Pin FBGA
FPGA Spartan-3A Family 400K Gates 8064 Cells 770MHz 90nm Technology 1.2V 256-Pin FTBGA
FPGA Spartan-3AN Family 400K Gates 8064 Cells 667MHz 90nm Technology 1.2V 256-Pin FTBGA
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