A version in the Xilinx tool represents a change in the input netlist. This usually represents a change in the HDL source code or re-synthesis of the netlist.
FPGA Spartan-3A Family 50K Gates 1584 Cells 770MHz 90nm Technology 1.2V 144-Pin TQFP
FPGA Spartan-3AN Family 50K Gates 1584 Cells 667MHz 90nm Technology 1.2V Automotive Medical 144-Pin TQFP EP
FPGA XC5200 Family 23K Gates 1936 Cells 83MHz 0.5um Technology 5V 208-Pin HSPQFP EP
FPGA XC5200 Family 23K Gates 1936 Cells 83MHz 0.5um Technology 5V 160-Pin PQFP
FPGA Virtex-II Family 1M Gates 11520 Cells 650MHz 0.15um Technology 1.5V 896-Pin FCBGA
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