Deviation indicates the difference in the time the signal reaches different end points. Delay introduced differentially into one signal with respect to another.
CPLD CoolRunner -II Family 12K Gates 512 Macro Cells 128MHz 0.18um Technology 1.8V 256-Pin FTBGA
FPGA XC5200 Family 23K Gates 1936 Cells 83MHz 0.5um Technology 5V 208-Pin HSPQFP EP
FPGA Spartan-3 Family 50K Gates 1728 Cells 725MHz 90nm Technology 1.2V 100-Pin VTQFP
FPGA Spartan-3A Family 50K Gates 1584 Cells 667MHz 90nm Technology 1.2V 256-Pin FTBGA
FPGA Spartan-3A Family 50K Gates 1584 Cells 667MHz 90nm Technology 1.2V 100-Pin VTQFP
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