RTL in Electronic Science refers to the abbreviation of Register Transfer Level Circuit (Register Transfer Level), also known as register transfer level.
RTL is a resistance transistor logic circuit.
In EDA design, RTL means register transfer level
Register transfer stage
In integrated circuit design, register-transfer level (RTL) is an abstract level used to describe the operation of synchronous digital circuits.
At the RTL level, the IC is composed of a set of registers and logical operations between the registers. This is so because the vast majority of circuits can be regarded as storing binary data by registers, and completing data processing by logical operations between registers. The flow of data processing is controlled by the timing state machine. These processing and control It can be described by hardware description language.
The simple difference between the RTL level and the gate level is that RTL is a hardware description language (Verilog or VHDL) to describe the desired function, and the gate level is to use a specific logic unit (depending on the manufacturer's library) to implement your function, gate level Finally, it can be processed into actual hardware in a semiconductor factory. In a word, RTL and gate level are different stages of design and implementation. After logic synthesis of RTL, gate level is obtained.
RTL description can be expressed as a finite state machine, or a more general sequential state machine that can perform register transfer on a predetermined clock cycle boundary, usually in two languages: VHDL/verilog.
RTL circuit is the earliest successfully developed integrated circuit with practical value. The input terminals of N gates are connected in parallel to the output terminal of the DCTL circuit. Because the transistor base voltage of the output gate of the DCTL circuit is not completely consistent, the current curve is not completely consistent, and the input current is prone to uneven distribution. A load gate with a small input current may not get enough base drive current to reach saturation, so that the output may change from the proper "0" state to the "1" state, causing errors in the system. The more the load input terminals are connected in parallel, the greater the possibility of uneven current distribution. This phenomenon is called "grabbing current".
In the RTL circuit, a resistor is connected in series with the base of each input stage, which is intended to be improved and compensated, so that the base input current Ib is less dependent on the base-emitter V formula symbol-Ib characteristics. The maximum load gate number of the RTL circuit can be determined according to the resistance of Rb.
The RTL circuit has a simple structure and few components. The serious disadvantage of the RTL circuit is that there is resistance in the base loop, which limits the switching speed of the circuit, the anti-interference performance is also poor, and the load cannot be excessive when used. The RTL circuit is a saturated circuit, which is only suitable for low-speed lines, and has actually been eliminated. In order to improve the switching speed of the RTL logic circuit, another capacitor is connected in parallel with the base resistance to form a resistor-capacitor-transistor logic circuit (RCTL). With the capacitor, not only can the switching speed be accelerated, but also the base resistance can be increased, thereby reducing the circuit power consumption. However, large-value resistors and capacitors take up a large chip area in the manufacturing process of integrated circuits, and it is also difficult to achieve the same tolerance design. Therefore, the RCTL circuit has not actually been developed.
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