This website uses cookies. By using this site, you consent to the use of cookies. For more information, please take a look at our Privacy Policy.
Home > Wiki encyclopedia > RPM

RPM

Relatively placed macros Relatively placed macros use RLOC constraints to group related logic together to reduce the amount and delay associated with routing.

ASSOCIATED PRODUCTS

  • XC2C384-7FGG324C

    XC2C384-7FGG324C

    CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 217MHz 0.18um Technology 1.8V 324-Pin FBGA

  • XC2C384-7PQG208C

    XC2C384-7PQG208C

    CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 217MHz 0.18um Technology 1.8V 208-Pin PQFP

  • XC2C512-10FG324I

    XC2C512-10FG324I

    CPLD CoolRunner -II Family 12K Gates 512 Macro Cells 128MHz 0.18um Technology 1.8V 324-Pin FBGA

  • XC5215-4HQ208C

    XC5215-4HQ208C

    FPGA XC5200 Family 23K Gates 1936 Cells 83MHz 0.5um Technology 5V 208-Pin HSPQFP EP

  • XC3S50-5CPG132C

    XC3S50-5CPG132C

    FPGA Spartan-3 Family 50K Gates 1728 Cells 725MHz 90nm Technology 1.2V 132-Pin CSBGA

FPGA Tutorial Lattice FPGA
Need Help?

Support

If you have any questions about the product and related issues, Please contact us.