PLL refers to frequency multiplier, used to double the frequency.
In the ARM data sheet, the PLL is called a frequency multiplier. As the name implies, it can double the frequency. If it is used to double the frequency of an external 12M crystal, the system can work at a clock frequency of 48MHz.
FPGA Spartan-3 Family 50K Gates 1728 Cells 630MHz 90nm Technology 1.2V 100-Pin VTQFP
CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 125MHz 0.18um Technology 1.8V 208-Pin PQFP
CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 125MHz 0.18um Technology 1.8V 144-Pin TQFP EP
CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 217MHz 0.18um Technology 1.8V 256-Pin FTBGA
CPLD CoolRunner -II Family 9K Gates 384 Macro Cells 217MHz 0.18um Technology 1.8V 144-Pin TQFP EP
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