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LVDS (Low-Voltage Differential Signaling) is a differential signal technology with low power consumption, low bit error rate, low crosstalk and low radiation. This transmission technology can reach more than 155Mbps. The core of LVDS technology is adopted Extremely low voltage swing high-speed differential transmission data can realize point-to-point or point-to-multipoint connection. The transmission medium can be copper PCB connection or balanced cable.

Differential signaling is a method of transmitting information electrically by means of two complementary signals sent on two separate wires. This offers better immunity to ambient noise and faster signal propagation.



LVDS (Low Voltage Differential Signalin) is a low amplitude differential signal technology. It uses very low amplitude signals (about 350mV) to transmit data through a pair of differential PCB traces or balanced cables. It can transmit serial data at speeds up to thousands of Mbps. Because the voltage signal amplitude is low and it is driven by a constant current source mode, it generates very low noise and consumes very little power, and the power consumption is almost unchanged regardless of the frequency. In addition, because LVDS transmits data differentially, it is less susceptible to common mode noise.

LVDS was originally a high-speed signal transmission level proposed by National Semiconductor. Since then, LVDS has been defined in the following two standards: IEEEP1996.3 (adopted in March 1996), mainly for SCI ( Scalable Coherent Interface). Defines the electrical characteristics of LVDS, and also defines the encoding of packet exchange in the SCI protocol; ANS/EIA/EIA-644 (adopted in November 1995), mainly defines the electrical characteristics of LVDS, and recommends Parameters such as maximum transmission rate and theoretical limit rate. The commonly mentioned LVDS standard refers to the latter. In 2001, the ANS/EIA/EIA-644 standard has been revised and published.


With the continuous advancement of electronic design technology, the interconnection of high-rate signals and the application of broadband channels are increasing day by day, and the amount of data that needs to be transmitted is getting larger and faster. At present, the existing point-to-point physical layer interfaces such as RS-422, RS-485, SCSI, and other data transmission standards, due to inherent limitations in speed, noise, EMI/EMC, power consumption, cost, etc., make it more and more It is difficult for practical application. Also with the development of military electronic technology, in the field of space communication, such as tracking and data relay satellite systems (TDSS), in order to achieve high-speed data relay and ranging, speed measurement. High transmission rate, wide bandwidth occupation must first be solved The problems brought about; in the field of radar applications, the emergence of various new systems of radar and the application in different fields such as broadband detection and electronic countermeasures also inevitably face the problem of high-speed data collection and transmission; therefore, the use of new I/ O interface technology to solve the bottleneck problem of data transmission is increasingly prominent. LVDS, with its inherent low voltage, low power consumption and favorable high-speed transmission, has become the preferred interface standard for broadband high-speed system design. At present, the application of LVDS technology in the field of communication is becoming increasingly popular, especially in base stations, large switches and other high-speed data transmission systems, LVDS is playing an irreplaceable role.


Illustration of the basic working principle of LVDS. The source driver is composed of a constant current source (usually about 3.5mA, maximum 4mA) to drive a pair of differential signal lines. The receiver itself at the receiving end has a high DC input impedance, so almost all of the drive current flows through the 100Ω terminal matching resistor and generates a voltage of about 350mV at the input of the receiver. When the driving state of the source end reverses, the direction of the current flowing through the matching resistor changes, so that the logic state changes at the receiving end.

In order to adapt to the wide range of common mode voltage changes, in general, the LVDS receiver input stage also includes an automatic level adjustment circuit, which adjusts the common mode voltage to a fixed value, followed by a Schmitt trigger In addition, in order to prevent the Scdhmitt trigger from being unstable, the design has a certain hysteresis characteristic, and the Schmitt subsequent stage is the differential amplifier.



The reason why LVDS has become the current preferred signal form for high-speed I/O interfaces to solve the limitations of high-speed data transmission is because it has advantages in terms of transmission speed, power consumption, anti-noise, and EMI.

①High-speed transmission capability. The LVDS standard in the definition of ANS/EIA/EIA-64 has a theoretical limit rate of 1.923 Gbps. The constant current source mode and the low-swing output operating mode determine that IVDS has high-speed driving capability.

② Low power consumption characteristics. LVDS devices are implemented using CMOS technology, and CMOS can provide lower static power consumption; when the drive current of the constant current source is 3.5mA, the power consumption of the load (100Ω terminal matching) is only 1.225mW; the power consumption of LVDS is It is constant and does not rise with respect to frequency like the dynamic power consumption of CMOS transceivers. The drive design of the constant current source mode reduces the system power consumption and greatly reduces the influence of frequency components on power consumption. Although the power consumption of CMOS is lower than that of LVDS when the rate is low, as the frequency increases, the power consumption of CMOS will gradually increase, and eventually it will consume more power than LVDS. Generally, when the frequency is equal to 200MSps, the power consumption of LVDS and CMOS is about the same.

③ The power supply voltage is low. With the development of integrated circuits and the demand for higher data rates, low-voltage power supplies have become urgently needed. Reducing the supply voltage not only reduces the power consumption of high-density integrated circuits, but also reduces the heat dissipation pressure inside the chip, which helps to improve the integration. The driver and receiver of LVDS do not depend on specific supply voltage characteristics, which determines its peak in this regard.

④Strong anti-noise ability. The inherent advantage of differential signals is that noise is coupled in a common mode on a pair of differential lines and subtracted in the receiver to eliminate noise, so LVDS has a strong ability to resist common mode noise.

⑤ Effectively suppress electromagnetic interference. Because the polarities of the differential signals are reversed, the electromagnetic fields radiated by them can cancel each other out. The closer the coupling, the less electromagnetic energy is released to the outside, which reduces EMI.

⑥ The timing positioning is accurate. Because the switching change of the differential signal is at the intersection of the two signals. Unlike ordinary single-ended signals that rely on high and low threshold voltages to judge, they are less affected by process and temperature, which can reduce timing errors and facilitate the efficient transmission of high-speed digital signals.

⑦Adapt to the wide range of ground plane voltage variation. The LVDS receiver can withstand a voltage change of at least ±1V between the driver and the receiver. Since the typical bias voltage of the IVDS driver is +1.2V, the sum of the voltage variation of the ground, the bias voltage of the driver, and the noise coupled to it lightly is the common-mode voltage at the input of the receiver relative to the driver's ground. When the swing does not exceed 400mV, the common mode range is +0.2V~+2.2V. Furthermore, under normal circumstances, the input voltage range of the receiver can vary from 0V to +2.4V.

It is precisely because of the above-mentioned main characteristics of LVDS that HyperTansport (by AMD), Irfiniband (ly Intel), PCI-Express (by Intel) and other third-generation I/O bus standards (3G IO) are invariably low-voltage differential signals (IVDS) as the next-generation high-speed signal level standard.


In the field of radar applications, with the development of technology, the emergence and popularization of new system radars such as DBF system radars, phased array radars, etc., the signal bandwidth and the number of signal channels required to be processed have increased significantly, facing the transmission of large amounts of data problem. Therefore, the new technology adopted to solve the I/O interface problem has become an inevitable trend. LVDS, a high-speed and low-power interface standard, makes it possible to solve this transmission bottleneck problem. Therefore, the current LVDS technology is widely used in high-speed radar and high-speed receiving systems; using LVDS technology to achieve point-to-point single-board interconnection, the system structure is very scalable, and the line card and various subsystems are highly integrated and completely Can meet the requirements of data collection and transmission.

In terms of civilian use, this technology can support high-speed data transmission, and is most suitable for communication structure applications such as base stations, switches, add/subtract multiplexers, consumer product application solutions such as set-top boxes and home/enterprise video links, and medical applications. Ultrasonic imaging equipment and digital photocopiers, etc., ensure that the system partition operation can play a greater flexibility. System design engineers can use LVDS technology to set analog and digital signal processing sections on different circuit boards, and then use cables or backplanes to transmit the digital data output by the A/D converter to ensure that the structural design can play more flexibility. At present, all kinds of high-speed AD converters basically choose to use the LVDS signal as the output format of the sampled data, and the output form is mostly parallel output. At the same time, special chips supporting IWDS and other level interchange and special chips for LVDS speed reduction are also emerging, mainly represented by several foreign companies such as MAXM, NI and TI.

In addition, in the high-speed data transmission of the measurement and control system, SAR radar reconnaissance reception and high-speed digital image transmission applications, LVDS has a very broad application space. Especially in the recent and future years, the demand for high-rate communication systems with flexible systems in the aerospace, military, and communications sectors continues to grow. On the one hand, the core of the traditional communication system, filters, mixers and many other links are mostly implemented by analog devices, which are greatly restricted in terms of system reliability, flexibility, upgrade and maintenance, etc. In the past 20 years, the rapid development of microelectronics technology, integrated circuits, and digital communication theory has provided the possibility of using digital methods to realize many links of high bit rate communication systems. According to the information obtained so far, a number of high-rate baseband signal processors with excellent performance and flexibility have been developed abroad. Under such a large background, as a unit dedicated to the development of China's military electronic technology, especially focusing on the research and development of related technologies and products in the field of aerospace measurement and control, at present, we have been in the research process of high bit rate data transmission technology Significant breakthroughs have been made in China, and one of the key technologies applied is LVDS technology.


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