IBIS is the input/output buffer information specification, which is the standard model information of a component.
The IBIS model is a method for quickly and accurately building I/O buffers based on V/I curves. It is an international standard that reflects the electrical characteristics of chip drivers and receivers. It provides a standard file format for recording such as drives. The parameters such as output impedance, rise/fall time and output load are very suitable for the calculation and simulation of high-frequency effects such as ringing and crosstalk.
The IBIS model is used to describe the characteristics of the I/O buffer information. The behavior description of an input and output port can be decomposed into a series of simple function modules. From these simple function modules, a complete IBIS model can be built, including packaging The resulting parasitic parameters, the parasitic capacitance of the silicon itself, the embedded protection circuit of the power supply or ground, the threshold and enable logic, the pull-up and pull-down circuits, etc.
CPLD CoolRunner -II Family 750 Gates 32 Macro Cells 323MHz 0.18um, CMOS Technology 1.8V 32-Pin QFN
CPLD CoolRunner -II Family 750 Gates 32 Macro Cells 200MHz 0.18um, CMOS Technology 1.8V 56-Pin CSBGA
Xilinx QFP-160
FPGA XC4000E Family 28K Gates 2432 Cells 0.35um Technology 5V 208-Pin HSPQFP EP
FPGA XC5200 Family 16K Gates 1296 Cells 83MHz 0.5um Technology 5V 144-Pin TQFP
Support