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As we discussed earlier, the issues of convergence, nonlinearity and also mixed-signal boundaries are an important issue and are no less important in Verilog-AMS. As we saw with VHDL-AMS, the first boundary to consider is from analog to digital, and in Verilog-AMS this can be implemented using the cross function.
Using this approach, the crossing can be tested and then also whether it is rising or falling; in this example it is looking for the voltage at node x crossing 2, and the 1 denotes a rising crossing.
1 always begin
2 @(cross(V(x) − 2 ,1))
3 q = 1;
4 end
In this case, the transition is looking for a falling cross and in this case the logic signal q is set to 0:
1 always begin
2 @(cross(V(x) − 2 ,−1))
3 q = 0;
4 end
In the opposite direction, the transition function is used to look for changes in logic values and then to use that to set an analog variable, as in this example where the logic input (din) is checked and, if high, sets the voltage on pin p to 3.3 or 0 V if low.
1 V(p) <+ transition((din == 1) ? 3.3 : 0.0);
Using these two operators, mixed-signal elements such as comparators, ADCs, or DACs can be implemented.
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