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As we saw with the VHDL-AMS approach, we can create a simple voltage source that has two pins p and m, with a dc value (dcv) using a simple Verilog-AMS model. In some ways the Verilog-AMS model is simpler to implement than its VHDL-AMS equivalent, as there is no separate entity and architecture, just a single module, and this is shown in the listing:
1 module vdc(p,m)
2 inout p; / Positive Terminal
3 inout m; / Negative Terminal
45 electrical p,m; / Define ports as electrical
67 parameter real dcv = 0.0; / define the DC voltage with a default value of 0.0
89 analog begin
10 V(p,m) <+ dcv;
11 end
12
13 endmodule
In the case of the resistor, the basic model is very similar to the voltage source with two electrical pins p and m with a single parameter, this time for the nominal resistance rnom.
1 module resistor(p,m)
2 inout p; / Positive Terminal
3 inout m; / Negative Terminal
45 electrical p,m; / Define ports as electrical
67 parameter real rnom = 1.0; / define the resistance with a default value of 1.0
89 analog begin
10 V(p,m) <+ I(p,m) ∗ rnom;
11 end
12
13 endmodule
Manufacturer:Xilinx
Product Categories: FPGAs (Field Programmable Gate Array)
Lifecycle:Active Active
RoHS:
Manufacturer:Xilinx
Product Categories: FPGAs (Field Programmable Gate Array)
Lifecycle:Active Active
RoHS:
Manufacturer:Xilinx
Product Categories: FPGAs (Field Programmable Gate Array)
Lifecycle:Active Active
RoHS: No RoHS
Manufacturer:Xilinx
Product Categories: Commutateurs analogiques
Lifecycle:Obsolete -
RoHS: -
Manufacturer:Xilinx
Product Categories:
Lifecycle:Obsolete -
RoHS: -
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