FONT SIZE : AAA
Most design engineers are familiar with the concepts of digital or analog modeling; however, a true understanding of true mixed-signal modeling is often lacking. In order to explain the term mixed-signal modeling it is necessary to review what we mean by analog and digital modeling first. First, consider digital modeling techniques.
Digital systems can be modeled using digital gates or events. This is a fast way of simulating digital systems structurally and is based on VHDL or Verilog gate level models. Digital simulation with digital computers relies on an event-based approach, so rather than solve differential equations, events are scheduled at certain points in time, with discrete changes in level. The resolution of multiple events and connections is achieved using logical methods. The digital models are usually gates, or logic based, and the resulting simulation waveforms are of fixed, predefined levels (such as 0 or 1). Also, instantaneous changes can take place, that is, the state can change from 0 to 1 with zero risetime.
In the analog world, in contrast, the lowest level of detail in practical electrical system design is the use of analog equation models in an analog simulator; the benchmark of this approach is historically the SPICE simulator. In many cases the circuit is extracted in the form of a netlist. The netlist is a list of the components in the design, their connection points and any parameters (such as length, width, or scaling) that customize the individual devices.
Each device is modeled using nonlinear differential equations that must be solved using a Newton-Raphson type approach. This approach can be very accurate, but is also fraught with problems such as:
• Convergence: If the model does not converge, then the simulation will not give any meaningful result or fail altogether.
• Oscillation: If there are discontinuities, the solution may be impossible to find.
• Time: The simulations can take hours to complete, days for large designs with detailed device models.
In the analog domain the Newton-Raphson approach is generally used to find a solution that relies on calculating the derivatives as well as the function value to obtain the next solution. The basic Newton-Raphson method for nonlinear equations is defined as:
F(x n ) and F ? (x n ) must be explicitly known and coded into the simulator (for SPICE) and this gives an approximate solution to the exact problem. For VHDL-AMS simulators the derivatives must be estimated using a Secant method (or similar).
Figure 18.4 Newton-Raphson method.
So given these diametrically opposed methods, how can we put them together? What about mixed signal systems? In these cases, there is a mixture of continuous analog variables and digital events. The models need to be able to represent the boundaries and transitions between these different domains effectively and efficiently. The basic mechanism for checking if an analog variable crosses a threshold is to use the ’above operator in VHDL-AMS.
For example, to check if a voltage vin is above 1.0V, the following VHDL-AMS could be used:
1 if ( vin’above(1.0) ) then
2 flag <= true;
3 end if;
This can be extended to use parameters in the model, say a threshold voltage parameter vth defined previously as a generic or constant.
1 if ( vin’above(vth) ) then
2 flag <= true;
3 end if;
Notice that the flag is a signal and is therefore able to be used in the sensitivity list to a process enabling digital behavior to be triggered when the threshold is crossed. If the oppositecondition is required, that is, below the threshold, then the condition is simply inverted using the not operator:
1 if ( not vin’above(vth) ) then
2 flag <= true;
3 end if;
The digital to analog interface is slightly more complex than the analog to digital interface, inasmuch as the output variable needs to be controlled in the analog domain. When a digital event changes (this can be easily monitored by a sensitivity list in a process), the analog variable needs to have the correct value and the correct rate of change. To achieve this we use the RAMP attribute in VHDL-AMS. Consider a simple example of a digital logic to analog voltage interface.
• when din = ’1’ vout = 5V
• when din = ’0’ vout = 0V
This can be implemented using VHDL-AMS as follows:
1 process (din) :
2 begin
3 if ( din = ’1’ ) then
4 vdin = 5.0;
5 else
6 vdin = 0.0;
7 end if;
8 end process;
9 vout == vdin;
Clearly there will be problems with this simplistic interface as the transition of vout will be instantaneous, causing potential convergence problems. The technique to solve this problem is to introduce a ramp on the definition of the value of vout with a transition time to change continuously from one value to another:
1 vout == dvin’ramp(tt)
where tt (the transition time) is defined as a real number, for example, tt : real := 1.0e−9.
An alternative to the specific transition time definition is to limit the slew rate using the SLEWoperator. The technique to solve this problem is to introduce a slew rate definition on thedefinition of the value of vout with a transition time to change continuously from one value toanother:
1 vout == dvin’slew(max_slew_rate)
where max_slew_rate is defined as a real number, for example, max_slew_rate : real := 1.0e6.
Manufacturer:Xilinx
Product Categories:
Lifecycle:Obsolete -
RoHS: No RoHS
Manufacturer:Xilinx
Product Categories: Contrôleur logique
Lifecycle:Active Active
RoHS: No RoHS
Manufacturer:Xilinx
Product Categories: FPGAs (Field Programmable Gate Array)
Lifecycle:Active Active
RoHS:
Manufacturer:Xilinx
Product Categories: Contrôleur logique
Lifecycle:Unconfirmed -
RoHS: No RoHS
Manufacturer:Xilinx
Product Categories: FPGAs (Field Programmable Gate Array)
Lifecycle:Active Active
RoHS: No RoHS
Support
