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In Verilog the approach is very similar to the VHDL, except that we use a slightly different conditional assignment syntax using a case statement:
1 case (CharIn)
2 4’h0: HexOut = 7’b1000000;
3 .
4 default: HexOut = 7’b0110110;
5 endcase
The resulting Verilog code is given here:
1 module HexDecoder(HexOut, CharIn);
2 output reg [6:0] HexOut;
3 input [3:0] CharIn;
4
5 always @(CharIn)
6 case (CharIn)
7 4’h0: HexOut = 7’b1000000;
8 4’h1: HexOut = 7’b1111001;
9 4’h2: HexOut = 7’b0100100;
10 4’h3: HexOut = 7’b0110000;
11 4’h4: HexOut = 7’b0011001;
12 4’h5: HexOut = 7’b0010010;
13 4’h6: HexOut = 7’b0000010;
14 4’h7: HexOut = 7’b1111000;
15 4’h8: HexOut = 7’b0000000;
16 4’h9: HexOut = 7’b0011000;
17 4’hA: HexOut = 7’b0001000;
18 4’hB: HexOut = 7’b0000011;
19 4’hC: HexOut = 7’b1000110;
20 4’hD: HexOut = 7’b0100001;
21 4’hE: HexOut = 7’b0000110;
22 4’hF: HexOut = 7’b0001110;
23 default: HexOut = 7’b0110110;
24 endcase
25 endmodule
And, again this is tested using a simple counter to display each character in sequence. In this example, the FPGA is running with a clock frequency of 50 MHz, so by setting a counter to 50 × 10 6 the increment will take place at roughly one-second intervals and display each character in turn. The complete test bench is shown in this listing:
1 module test1 (
2 clk,
3 hex0,
4 dp0
5 );
6
7 / Configuration parameters
8 localparam HB_CNT_WIDTH = 26;
9 localparam HB_CNT_MSb = HB_CNT_WIDTH − 1;
10
11 input clk;
12 output [6:0] hex0;
13 output dp0;
14
15 reg [ HB_CNT_MSb:0] hbled_r = {HB_CNT_WIDTH{1’b0}};
16 reg [3:0] CharIn = 4’h0;
17 reg dp0;
18
19 always @ (posedge clk)
20 begin
21 / Set the decimal point High which is OFF for this module
22 dp0 = 1’b1;
23
24
25
26 / When the counter reaches zero − increment the character shown
27 if (hbled_r == 50000000) begin
28 CharIn <= CharIn + 4’b0001;
29 hbled_r <= 0;
30 end else begin
31 / Increment the counter
32 hbled_r <= hbled_r + 1’b1;
33 end
34 end
35
36 / Decode the character into the LED segments
37 HexDecoder HexDecoder1(hex0, CharIn);
38
39 endmodule
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