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After reading chapter 7 we might be forgiven to think that FPGA-based prototyping involves quite a few changes to the SoC RTL but that does not always need to be the case. That chapter covered many possible scenarios and it would be a pathological design indeed that needs all of them to be fixed but, nevertheless, a good prototyping team will not be daunted by even the most FPGA-hostile SoC design. Armed with the best tools, IP, boards and devices and most importantly the right expertise and approach, we can tackle any SoC design and create an FPGA- ready version of at least the majority subset of the design.
However, that is only the minimum acceptable result of a FPGA-based prototyping project and far more is achievable. As we outlined in chapter 9, a Design-forPrototyping approach will ensure that the SoC design does not arrive as FPGA hostile in the first place.
We do not have to accept the third law of prototyping as a simple fact of life. A Design-for-Prototyping approach means that we can break the third law and make our SoC designs, if not FPGA-friendly, then at least FPGA-tolerant!
Manufacturer:Xilinx
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Manufacturer:Xilinx
Product Categories: FPGAs
Lifecycle:Obsolete -
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Manufacturer:Xilinx
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