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The second law is true when comparing the core speed of both types of device, where the fine-grained and infinitely versatile architecture of an SoC customer chip means that it can outpace an FPGA, with its coarse-grained programmable architecture. So we should expect the RTL from an SoC design with a core speed of many hundreds of megahertz to run in an FPGA with core speeds in the region of 20MHz to 100MHz.
However, this speed is reduced if the design’s critical path crosses the FPGA boundary and especially if multiplexing is used between the FPGAs. Both of these situations are common so the typical performance of a prototype in most cases is between 10MHz and 25MHz. Nevertheless, this prototype speed represents by far the fastest pre-silicon platform possible for exercising the RTL of an SoC design.
So the core speed of an FPGA is relatively fast but the first law holds true. At the IO the FPGA is just as fast as the SoC silicon in most regards and is able to support very much the same standardized peripheral interfaces as the SoC. Indeed, the ability of the FPGA IO to reproduce fast peripheral interfaces is one of their most valuable advantages over slower verification technologies. In addition we can use external PHY devices as well as those built into the FPGA.
All this means that it is common to find FPGA-based prototypes USB at 125MHz, or HD video running at full 72MHz rates. For the IO, therefore, with care and the right IP, we can break the second law of prototyping even if it still holds true for the core logic.
Manufacturer:Xilinx
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Manufacturer:Xilinx
Product Categories: FPGAs (Field Programmable Gate Array)
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Manufacturer:Xilinx
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Manufacturer:Xilinx
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Manufacturer:Xilinx
Product Categories: FPGAs
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