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Home > FPGA Technical Tutorials > FPGA-Based Prototyping Methodology > PROTOTYPING + VERIFICATION = THE BEST OF BOTH WORLDS > Required effort

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Required effort

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Unfortunately, we cannot just plug a prototype into a simulator and expect it to  work. Getting a hybrid verification system to work is not always a push-button  exercise, although tool environments will automatically generate some of the code  that is needed. On top of having code for interfaces, designers have to perform some  design conditioning to enable co-simulation and transaction-based verification. 

If a design team knows that it will use its prototype in a hybrid verification  environment before we start to implement it, the incremental effort required is not  that great. It’s difficult to quantify the extra design work needed because it depends  on many variables. Preparing a design for co-simulation is a question of setting a  few constraints within the tool environment. The effort required to enable a design  for transaction-based verification depends on whether transactors are already  available or need to be created. It is probably reasonable to add 10% to 15% to the  “time to prototype” effort in order to ready the FPGA for transaction-based  verification. 

In order to decide whether the incremental effort is worth it, designers need to know  what they can achieve with a hybrid verification environment.

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