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IP Libraries
A large number of IP libraries exist, varying from open source projects, commercial IP vendors as well as in-house IP libraries solely for use by an individual or company. In this section we will further explore the various sources of IP, covering any limitations which exist and provide some specific examples.
Vivado IP Catalog
The Vivado IP Catalog presents a centralised repository for all of your IP modules, including Xilinx, third-party and custom IP which can be shared between multiple end users to enable effective design reuse. The key features of the Vivado IP Catalog include [6]:
• All available IP is based on the IP-XACT standard, providing an open and consistent IP interface.
• A consistent interface by which to access all Xilinx IP from a common, easy access repository.
• Support for multiple repository locations, including network storage locations, allowing a consistent IP deployment environment for external or custom developed IP.
• Integrated IP design examples which provide the ability to evaluate IP as an instantiated source in a Vivado project.
• Global RTL synthesis of IP with the ability simulate using behavioural simulation models or synthesisable RTL.
• The ability to output simulation models, HDL example designs and instantiation templates on-demand.
• Instantly accessible options to customise and generate IP using the Vivado IDE or Tcl automatic scripting.
Third-Party
In recent years there has been a shift to companies designing and licensing IP cores, rather than manufacturing and selling physical silicon products. A good example of such a company is ARM Holdings who develop and license the ARM processors which form part of the Zynq platform. ARM Holdings do not manufacture any physical processor chips, and instead licenses its designs as IP modules.
Third-party IP vendors can range from an individual who licenses a single design all the way up to a large, multi-billion dollar corporations with thousands of individual IP designs available. Some companies licence IP cores that are optimised for Xilinx devices, with many such companies being members of the Xilinx Alliance Program — a worldwide ecosystem of collaborating companies which work with Xilinx to further the development of All Programmable technologies [7]. Examples of Xilinx-specific IP that is available from Alliance members include memory controllers, image and video codecs, motor controllers and graphics accelerators. As most IP available from Alliance members is optimised for use on Xilinx devices, the use of their IP can help to maximise performance while minimising resource utilisation. Furthermore, most of the available IP provides support for the Xilinx design flow, allowing it to be easily integrated in your design.
There is also a large range of IP vendors who develop and license generic IP modules which are designed to be non-vendor-specific. Such generic IP cores are generally packaged as synthesisable RTL, although in some cases a gate-level netlist is provided. When provided as RTL, the end-user has the ability to modify the IP design to a certain degree, although vendors offer little support for modified designs. A gate-level netlist can be compared to an assembly-code listing in computer programming, and gives the IP vendor a certain degree of security against the reverse engineering of their designs.
More recently, the open source community has begun developing IP cores and providing them free-of-charge. Generally, open source IP cores are distributed under one of two licenses: the GNU Lesser General Public License (LGPL) or the modified-BSD license. In terms of delivery, open source IP is usually provided as generic synthesisable RTL; it is rare to find an open source IP core that is truly vendor-specific. The most notable open source IP provider is OpenCores which is the world’s largest community for the development of open source IP cores [3].
There are a number of advantages and disadvantages to using both vendor-specific and non-vendor-specific IP cores. These are summarised in Table 18.1.
Custom IP
Custom IP which is created by any of the methods described in Chapter 13 can be easily integrated into the Vivado IP Catalog to add to the comprehensive collection of Xilinx IP. Depending on the design method of choice, the IP may be able to be imported to the IP Catalog directly. IP created using System Generator or Vivado HLS, for example, are packaged in a format that can be imported into the IP Catalog. For other design methods such as HDL design and HDL coder, the custom IP will have to be processed by IP Packager in order to be incorporated in the IP Catalog.
For more information on IP Packager, please refer to Section 18.5.2.
Manufacturer:Xilinx
Product Categories: CPLDs
Lifecycle:Active Active
RoHS: No RoHS
Manufacturer:Xilinx
Product Categories: CPLDs
Lifecycle:Active Active
RoHS:
Manufacturer:Xilinx
Product Categories: Embedded - CPLDs (Complex Programmable Logic Devices)
Lifecycle:Active Active
RoHS:
Manufacturer:Xilinx
Product Categories:
Lifecycle:Any -
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Manufacturer:Xilinx
Product Categories: FPGAs (Field Programmable Gate Array)
Lifecycle:Obsolete -
RoHS: No RoHS
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