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Overview of Exercise 4A

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Overview of Exercise 4A

In this exercise a simple IP module will be created in HDL (VHDL) which will allow the  LEDS on the ZedBoard to be controlled by software running on the PS. This will utilise the  Create and Package IP Wizard in Vivado to create an AXI-Lite interface wrapper which will  allow the custom IP to be connected as an AXI-Lite slave to the Zynq processor. The IP  packaging process will be introduced, detailing the automatic AXI-Lite interconnect  detection and the inference of memory mapped registers. The external LED pins will be  mapped to the LED interface in the IP Integrator design by creating a new XDC file.

The steps involved in this Exercise are:

1. Create a new project in Vivado IDE.

2. Invoke the Create and Package IP Wizard and create a new AXI-Lite slave IP.

3. Add custom functionality to the generated IP template.

4. Package the newly customised IP with IP Packager.

5. Add the packaged IP to the IP Catalog.

6. Create a block diagram and connect the LED IP to the Zynq processor via the AXI interconnect.

7. Generate and export the hardware design to the SDK.

8. Create a simple software application to test that the custom IP functions correctly.

Exercise 4A is available on the website: www.zynqbook.com

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