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Typically when moving to a new version of the Vivado Design Suite, the Xilinx IP in your design will most likely be out-of-date and it will be locked. Each release of Vivado only delivers one version of each Xilinx IP. Locked IP cannot be re- customized nor be generated. If you had fully generated your IP as recommended in Sect. 3.4 , you can continue to use it as is since all the fi les needed for it are present.
You can review the change log and product guide for the IP in your design and determine if you wish to upgrade to the current version or not. The changes can vary from simple constraint changes, possible bug fi xes, to the addition of new features. Some upgrades will require changes to your logic as the ports of the IP could change or the functionality might necessitate logic changes in your design.
The process of upgrading is straightforward. Select the IP either in the Vivado RTL project in the IP Sources area or in the Managed IP project, and right click and select Upgrade IP . Once upgraded, you can proceed to generation of the output products. For speed and convenience, you can upgrade multiple IP in parallel.
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