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As it is such an important type, the std_logic type is described in this section. The type has the following definition:
U X 0 1 Z W L H - | uninitialized. This signal hasn’t been set yet. unknown. Impossible to determine this value/result. logic 0 logic 1 High Impedance Weak signal, can’t tell if it should be 0 or 1 Weak signal that should probably go to 0 Weak signal that should probably go to 1 Don’t care |
These definitions allow resolution of logic signals in digital designs in a standard manner that is predictable and repeatable across software tools and platforms. The operations that can be carried out on the basic std_logic data types are the standard built-in VHDL logic functions:
• and
• nand
• or
• nor
• xor
• xnor
• not
An example of the use of the std_logic library would be to define a simple logic gate, in this case a three input nand gate as shown in the following listing. The logic pin types are now defined using the IEEE standard library type std_logic rather than the default bit type.
1 library ieee;
2 use ieee.std_logic_1164.all;
3
4 entity nand3 is
5 port (
6 in0, in1, in2 : in std_logic;
7 out1 : out std_logic
8 );
9 end;
10
Figure 5.3 HDL based FPGA design flow.
11 architecture simple of nand3 is
12 begin
13 out1 <= in0 nand in1 nand in2;
14 end;
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