Bus Contention

Bus Contention

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Figure 29.png

Figure 30.png

Bus contention occurs when two outputs drive the same signal at the same time as shown in Figure 29. For obvious reasons, this is bad and reduces the reliability of the chip. If bus contention occurs even for short times during a clock cycle, after many clock cycles the possibility of damage to one of the drivers increases. The solution is to ensure that both drivers cannot be asserted simultaneously. This can be accomplished by inserting additional logic as shown in Figure 30. The ideal solution is to avoid tri-state drivers altogether, and use muxes whenever possible.

XC3S250E-4TQG144CS1

Manufacturer:Xilinx
FPGA Spartan-3E Family 250K Gates 5508 Cells 572MHz 90nm Technology 1.2V 144-Pin TQFP
Product Categories:

Lifecycle:Obsolete -

RoHS:

XC3S250E-5CPG132C

Manufacturer:Xilinx
FPGA Spartan-3E Family 250K Gates 5508 Cells 657MHz 90nm Technology 1.2V 132-Pin CSBGA
Product Categories:

Lifecycle:Active Active

RoHS: -

XC4020E-2HQ208C

Manufacturer:Xilinx
FPGA XC4000E Family 20K Gates 1862 Cells 0.35um Technology 5V 208-Pin HSPQFP EP
Product Categories: FPGAs (Field Programmable Gate Array)

Lifecycle:Obsolete -

RoHS: No RoHS

XC2018-50PC68C

Manufacturer:Xilinx
Field Programmable Gate Array (FPGA)
Product Categories: Driver IC

Lifecycle:Any -

RoHS: -

XC4020E-4HQ240I

Manufacturer:Xilinx
FPGA XC4000E Family 20K Gates 1862 Cells 0.35um Technology 5V 240-Pin HSPQFP EP
Product Categories: Condensateurs électrolytiques en aluminium

Lifecycle:Obsolete -

RoHS: No RoHS

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