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Since Gordon E. Moore described the trend of how many transistors can be placed
inexpensively on an integrated circuit, electronic design enabled by semiconductor
design has grown at a hard-to-imagine pace. The trend of transistors doubling every
two years has already continued for more than half a century and is not expected to
stop for a while despite repeated predictions that it would end soon.
A detailed review of the major trends driving chip design later in this chapter will
make it clear why prototyping has grown in adoption, and is even considered
mandatory in many companies. To further understand this trend, typical project
dynamics and their effort distributions need to be understood.
Let’s start with a definition. For the purposes of this book, we define system on chip (SoC) as a device which is designed and fabricated for a specific purpose, for exclusive use by a specific owner. Some might think of SoC as a particular form of an ASIC (application specific integrated circuit) and they would be correct, but for the purposes of this book, we will refer only to SoCs. We will stick to the definition that an SoC always includes at least one CPU and runs embedded software. In comparison, an ASIC does not necessarily include a CPU and to that extent, SoCs can be considered to be a superset of ASICs.
We do not mean to imply that those who are creating an ASIC, ASSP (application-specific silicon product) or silicon produced by COT (customer’s own tooling) or by third-party foundries should read another book. Technologies are not mutually unique for FPGA-based prototyping purposes and in fact, many FPGAbased prototyping projects are of an ASSP or even just pieces of IP that may be used in many different SoC designs.
As far as FPGA-based prototyping is concerned, if it works for SoC then it will work for any of the above device types. The reason for this book’s focus on SoC is that the greatest value of FPGA-based prototyping is in its unique ability to provide a fast and accurate model of the SoC in order to allow validation of the software.
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