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Basic Types
VHDL has the following standard types defined as built-in data types:
• bit
• Boolean
• bit_vector
• integer
• real
The bit data type is the simple logic type built into VHDL. The type can have two legal values 0 or 1. The elements defined as of type bit can have the standard VHDL built-in logic functions applied to them. Examples of signal and variable declarations of type bit follow:
1 signal ina : bit;
2 variable inb : bit := 0;
3 ina <= inb and inc;
4 ind <= 1 after 10 ns;
The Boolean data type is primarily used for decision making, so the test value for if statements is a Boolean type. The elements defined as of type Boolean can have the standard VHDL built-in logic functions applied to them. Examples of signal and variable declarations of type Boolean follow:
1 signal test1 : Boolean;
2 variable test2 : Boolean := false;
The basic numeric type in VHDL is the integer and is defined as an integer in the range −2147483647 to +2147483647. There are obviously implications for synthesis in the definition of integers in any VHDL model, particularly the effective number of bits, and so it is quite common to use a specified range of integer to constrain the values of the signals or variables to within physical bounds. Examples of integer usage follow:
1 signal int1 : integer;
2 variable int2: integer := 124;
There are two subtypes (new types based on the fundamental type) derived from the integer type which are integer in nature, but simply define a different range of values, as described in the following subsections.
The Natural subtype is used to define all integers greater than and equal to zero. They are actually defined with respect to the high value of the integer range as follows:
1 natural values : 0 to integer’high
The Positive subtype is used to define all integers greater than and equal to one. They are actually defined with respect to the high value of the integer range as follows:
1 positive values : 1 to integer’high
In addition to the numeric types inherent in VHDL, there are also the complete set of ASCII characters available for designers. There is no automatic conversion between characters and a numeric value per se, but there is an implied ordering of the characters defined in the VHDL standard (IEEE Std 1076-1993). The characters can be defined as individual characters or arrays of characters to create strings. The best way to consider characters is as an enumerated type.
Floating point numbers are used in VHDL to define real numbers and the predefined floating point type in VHDL is called real. This defines a floating point number in the range −1.0e38 to +10e38. This is an important issue for many FPGA designs, as most commercial synthesis products do not support real numbers precisely because they are floating point. In practice it is necessary to use integer or fixed point numbers which can be directly and simply synthesized into hardware. An example of defining real signals or variables is shown here:
1 signal realno : real;
2 variable realno : real := 123.456;
Time values are defined using the special time type. These not only include the time value, but also the unit separated by a space. The basic range of the time type value is between −2147483647 to 2147483647 and the basic unit of time is defined as the femtosecond (fs).
Each subsequent time unit is derived from this basic unit of the fs as shown here:
1 ps = 1000 fs;
2 ns = 1000 ps;
3 us = 1000 ns;
4 ms = 1000 us;
5 min = 60 sec;
6 hr = 60 min;
Examples of time definitions are shown here:
1 delay : time := 10 ns;
2 wait for 20 us;
3 y <= x after 10 ms;
4 z <= y after delay;
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