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Home > FPGA Technical Tutorials > Designing with Xilinx FPGAs Using Vivado > Simulation

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Simulation

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Introduction

Simulation is a way to verify the functionality of design by creating an HDL model  and putting it through various input conditions and verifying the output. If the FPGA  design doesn’t work as intended, i.e., it has bugs, then the design can be corrected  and the device can be reprogrammed easily. However, most modern circuits are  complex, and it is almost impossible to debug these circuits merely by observing the  outputs. For that purpose, Xilinx provides hardware debug solutions (explained in  Chap. 17 ). However, the whole process of hardware debug has its own challenges.  Unless the circuit is small and simple, it is prudent to identify and correct all design  issues up-front using simulation. That is, the reason simulation has become an integral part of current generation of FPGA designs. Xilinx Vivado not only provides its  own simulator, but it also has most of the industry standard simulators (i.e., Questa ,  NCSim / Incisive , VCS , and Aldec simulators) integrated into its environment. The  actual availability of the third-party simulators will depend on your license agreement with those simulators.

Vivado makes simulation very easy by providing the same framework for design  and simulation. Once the design (and testbench) is set up in Vivado, it can generate  scripts for seamless simulation—including for external simulators with very little to  no additional change.  

In this chapter we will go through the process of setting up the design for  simulation, running simulation, observing the outputs, and review various tools  available for debugging the design. We will also talk about Vivado’s native simulator and use of C-models to speed up the simulation. As mentioned in Sect. 2.2 ,all GUI actions get logged into vivado.jou , and those Tcl commands can be used  to create a script, for running in batch mode for automation and regression runs.  This chapter will explain some other alternative options for some of these commands. For an exhaustive list of options for these commands, you should use  <command> -help on the Tcl console of Vivado.



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