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Synthesis is the fi rst step, which maps architecture-independent RTL code into technology- specifi c primitives. Usually, synthesis tools are supposed to isolate the users from knowing the device details. However, having a good idea of device prim- itives allows you to fi ne-tune the synthesis behavior. This might be required mainly for the following reasons:
• Code written for another device might need tweaks in order to get optimal area, performance, and power on the current device.
• Sometimes, synthesis is done on individual parts of the design. So, what might appear as a good optimization decision in the context of that small design might not necessarily be the right decision in the context of the whole design. You might need to guide the synthesis tool in such cases to alter the optimization decisions.
• Sometimes, for designs with special purpose application, you might want to obtain the last bit of performance or area or power—depending on the need— even at the cost of a few other factors.
Synthesis behavior can also have an impact on how effi ciently a design can be taken through the back end place and route tools. In the context of this chapter, any synthesis behavior refers specifi cally to Vivado synthesis tool, though some other synthesis tools may also provide similar capabilities.
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