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In digital systems and HDLs such as VHDL or Verilog we have access to a range of types from bits and Booleans (which consist of two states 1 and 0, (or true and false, respectively) which are effectively enumerated types, through integer numbers (including positive and natural subtypes), and eventually we can use real numbers (floating point). Unfortunately, the big drawback is not necessarily what we can use in a particular HDL, but rather what we can synthesize in hardware. In most cases it is still not possible to directly synthesize real numbers directly.
Despite recent research efforts and standardization efforts, there is still a limited availability of packages and libraries that support both fixed point and floating point arithmetic specifically for FPGAs. If we consider most FPGA applications, there is a need for some DSP type applications, and generally a form of fixed point arithmetic will be adequate in most of these cases. While there are now some additional packages available as a result of the inclusion of the numeric_std library into VHDL, it is nevertheless useful to understand how the number systems work when translated into specific forms for use in digital systems.
So, what is fixed point arithmetic and how can we use it in FPGA design? In integer arithmetic, whether unsigned, signed, or std_logic, the basis of the number is a bitwise representation of an integer number, with no decimal point. For example, to represent the number 23, using 8 bits, we simply set a bit for each binary element required to construct the integer value of 23. This is shown in Figure 23.1.
If we require a negative number, then we use the signed approach, where the MSB is simply the sign bit as shown in Figure 23.2. In fact, the two’s complement notation (discussed in Chapter 22), can be obtained by inverting the bits and adding one to the LSB. We have in fact discussed the difference between the unsigned and signed format elsewhere in this book; however, in summary the signed numbers use a bit to denote the sign of the number (positive or negative), at the expense of 1 bit of range (effectively halving the maximum magnitude, but allowing positive or negative values). Unsigned numbers in contrast only represent the magnitude.
With this basic idea of handling numbers, we can extend the notation to a fixed point scheme by defining where the decimal point will go. For example, in the same number scheme shown we have 8 bits. We can therefore define this in terms of 5 bits above the decimal point and 3 below it. This will give some limited fractional usage for the numbers. The way that this is implemented is by using fractions of 1 for each negative bit to the right of the decimal point. As an example, take the same number in terms of bits used in Figure 23.3 and use the new fixed point numbering system for the bits. In this case, we get a value of −2.875.
The nice thing about this notation is that the bitwise functions defined for the integer-based ALU developed previously can also be applied to this new fixed point notation with almost no modification. The only difference is that we need to translate from the new fixed point type to a std_logic_vector type in VHDL and also consider how to handle overflow conditions.
Figure 23.1 Basic binary notation.
Figure 23.2 Negative number binary notation.
Figure 23.3 Fixed point notation.
For example, if two numbers are added together and the result is too large, how is this handled by the fixed point algorithms? Do we simply flag an overflow and output the result? Or do we set the maximum value and output this?
Similarly, for numbers which may be too small and for which we can potentially lose precision, do we simply round up or flag another loss of precision condition? These are questions that the designer needs to answer for their application, but for the rest of the chapter a simple approach will be taken that illustrates how the basic functions operate, and the details of handling these issues will be left to the reader, unless specifically identified and discussed.
In practice, it is useful for the designer to establish basic rules for whichever number scheme is used, such as aligning decimal points for certain operations, such as addition, or using automatic vector size increase for multiplication to ensure there are always an adequate number of bits available to handle the maximum possible range of numbers.
In the next section, the construction of a basic numeric package is discussed; however, it should be reiterated that the user can take advantage of the numeric_std package in VHDL.
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