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Mixed-Signal FPGAs

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FPGAs were originally conceived as pure digital devices, not including any analog circuitry, such as input or output analog interfaces, which had to be built outside the FPGA whenever required. In contrast, analog circuitry is necessary for many FPGA applications (in general, but particularly in the case of industrial embedded systems) where, therefore, the need for ADCs and DACs is unavoidable. Even if control logic for external ADCs and DACs can be usually implemented using distributed logic inside the FPGA, elim- inating the need for additional chips implementing glue logic and delays associated with external interconnections limit sampling or reconstruction frequency and may cause synchronization problems, thus having a negative impact on performance. 

The solution to this drawback is obvious: to include ADCs and DACs inside FPGAs as hardware specialized blocks, like the ones discussed in Section 2.4. This not only mitigates bandwidth and synchronization problems, but also allows chip count to be reduced. As a consequence, some FPGA vendors decided to include analog front ends in some of their device families, giving rise to the so-called mixed-signal FPGAs (Xilinx 2011, 2014, 2015; Microsemi 2014a,b; Altera 2015). Also, some existing devices combine configurable ana- log and digital resources in the so-called field-programmable analog arrays (FPAAs) (Anadigm 2006). 

The quite specific analog resources available in mixed-signal FPGAs are described throughout this chapter. Section 5.2 deals with ADC blocks, whereas analog sensors, and analog data acquisition and processing inter- faces are described in Sections 5.3 and 5.4, respectively. Although FPAAs themselves are out of the scope of this book, hybrid FPGA–FPAA solutions are analyzed in Section 5.5. 


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