CPLD-based Line Array CCD Driver Circuit Design
The working principle and status of the line CCD driving circuit are discussed, and the scheme of driving line CCD based on CPLD is selected. The EPM240T100C5N of MAX II device is used as the control, and the TCD1500C is used as an example to design the CPLD-based line CCD driver...
Date: Mar 10, 2021
Detailed introduction of SoC FPGA, including Xilinx and Altera product series
Generally speaking, SoC is called a system-level chip, also called system-on-chip, which means that it is a product, an integrated circuit with a dedicated target, which contains a complete system and all the contents of embedded software.
Date: Jan 08, 2021
FPGA system based on Flash and JTAG
The command and data translation between the JTAG interface and the Flash controller is completed by the programming control module in the backward compatible JTAG controller.
Date: Jul 13, 2020
How to use FPGA to realize high-definition low-stream video encoding
Video compression coding is the most effective way to reduce the code stream. Currently H.264 is the preferred standard for encoders. The H.264 encoding algorithm is very complicated, and many methods are used to reduce the encoding bitstream.
Date: Jul 13, 2020
Designing low latency system with Zynq SoC
The advent of Zynq?-7000 All Programmable SoC and small H.264 core. From this article you will get more information about it.
Date: Jul 13, 2020
Focus on Zynq SoC for Smarter Vision
With the Zynq-7000 All Programmable SoC, the processor and FPGA logic will be on the same chip, which means that developers now have a silicon chip platform that is ideal for smarter applications. "
Date: Jul 13, 2020
Design of FPGA-based real-time video image acquisition and display system
In real-time image processing systems, the key technology is the collection and processing of real-time images. The speed and quality of image acquisition directly affect the performance of this system.
Date: Jul 11, 2020
Design and Implementation of Machine Vision System Based on DSP and FPGA
The analog video signal adopts non-standard system. The camera works in external trigger mode. The FPGA provides the trigger signal. Each time the trigger is triggered, the camera transmits a signal.
Date: Jun 24, 2020
FPGA Spartan-3 Family 1M Gates 17280 Cells 725MHz 90nm Technology 1.2V 676-Pin FBGA
Xilinx BGA
Xilinx BGA
FPGA Spartan-II Family 100K Gates 2700 Cells 263MHz 0.18um Technology 2.5V 208-Pin HSPQFP EP
Xilinx PGA
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